LFEC3E-3FN256C LATTICE SEMICONDUCTOR, LFEC3E-3FN256C Datasheet - Page 135
![no-image](/images/manufacturer_photos/0/3/381/lattice_semiconductor_sml.jpg)
LFEC3E-3FN256C
Manufacturer Part Number
LFEC3E-3FN256C
Description
FPGA LatticeEC Family 3100 Cells 340MHz 130nm (CMOS) Technology 1.2V 256-Pin FBGA
Manufacturer
LATTICE SEMICONDUCTOR
Datasheet
1.LFEC3E-5TN144C.pdf
(163 pages)
Specifications of LFEC3E-3FN256C
Package
256FBGA
Family Name
LatticeEC
Device Logic Units
3100
Maximum Internal Frequency
340 MHz
Typical Operating Supply Voltage
1.2 V
Maximum Number Of User I/os
160
Ram Bits
56320
In System Programmability
Yes
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
LFEC3E-3FN256C
Manufacturer:
Lattice Semiconductor Corporation
Quantity:
10 000
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Lattice Semiconductor
LFECP/EC20, LFECP/EC33 Logic Signal Connections: 672 fpBGA (Cont.)
Number
AA23
AA22
AB23
AB24
AA21
AA24
AC25
AC26
AB25
AA25
AB26
AA26
GND
GND
W23
W24
W22
W21
W25
W26
Ball
Y19
Y21
Y23
Y22
Y24
Y25
Y26
V24
V21
V23
V22
V20
V25
U20
V26
U26
U24
U25
U23
U22
-
-
PROGRAMN
Function
PR47B
PR47A
PR46B
PR46A
PR45B
PR45A
PR44B
PR44A
PR43B
PR43A
PR42B
PR42A
PR41B
PR41A
PR39B
PR39A
PR38B
PR38A
PR37B
PR37A
GND3
DONE
GND3
CFG2
CFG1
CFG0
CCLK
INITN
Ball
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
-
-
LFEC20/LFECP20
Bank LVDS
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
-
-
-
-
-
-
-
-
-
-
-
-
-
C
C
C
C
C
C
C
C
C
C
T
T
T
T
T
T
T
T
T
T
RLM0_PLLC_FB_A
RLM0_PLLC_IN_A
RLM0_PLLT_FB_A
RLM0_PLLT_IN_A
Dual Function
DOUT/CSON
BUSY/SISPI
DI/CSSPIN
D7/SPID0
RDQS45
4-69
Number
AA23
AA22
AB23
AB24
AA21
AA24
AC25
AC26
AB25
AA25
AB26
AA26
GND
GND
GND
GND
W23
W24
W22
W21
W25
W26
Ball
Y19
Y21
Y23
Y22
Y24
Y25
Y26
V24
V21
V23
V22
V20
V25
U20
V26
U26
U24
U25
U23
U22
PROGRAMN
Function
PR65A
PR64B
PR64A
PR63B
PR63A
PR62B
PR62A
PR61B
PR61A
PR60B
PR60A
PR59B
PR59A
PR58B
PR58A
PR57B
PR57A
PR56B
PR56A
PR55B
PR55A
PR54B
PR54A
PR53B
PR53A
PR51B
PR51A
PR50B
PR50A
PR49B
PR49A
DONE
GND3
GND3
GND3
GND3
CFG2
CFG1
CFG0
CCLK
INITN
Ball
LatticeECP/EC Family Data Sheet
LFECP/EC33
Bank
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
LVDS
C
C
C
C
C
C
C
C
C
C
C
C
C
C
C
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
Pinout Information
RLM0_PLLC_FB_A
RLM0_PLLT_FB_A
RLM0_PLLC_IN_A
RLM0_PLLT_IN_A
DOUT/CSON
BUSY/SISPI
DI/CSSPIN
D7/SPID0
Function
RDQS65
RDQS57
Dual
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