CP3UB26G18NEPX National Semiconductor, CP3UB26G18NEPX Datasheet - Page 144
CP3UB26G18NEPX
Manufacturer Part Number
CP3UB26G18NEPX
Description
Manufacturer
National Semiconductor
Datasheet
1.CP3UB26G18NEPX.pdf
(270 pages)
Specifications of CP3UB26G18NEPX
Operating Temperature (min)
-40C
Operating Temperature (max)
85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
128
Package Type
LQFP
Lead Free Status / RoHS Status
Not Compliant
Available stocks
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Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
CP3UB26G18NEPX
Manufacturer:
Texas Instruments
Quantity:
10 000
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19.6.4
The AAI can operate in a special IOM-2 compatible mode to
allow to connect to an external ISDN controller device. In
this IOM-2 mode, the AAI can only operate as a slave, i.e.
the bit clock and frame sync signal is provided by the ISDN
controller. The AAI only supports the B1 and B2 data of the
IOM-2 channel 0, but ignores the other two IOM-2 channels.
The AAI handles the B1 and B2 data as one 16-bit data
word.
Figure 64 shows the connections between an ISDN control-
ler and a CP3UB26 using a standard IOM-2 interface for the
B1/B2 data communication and the external bus interface
(IO Expansion) for controlling the ISDN controller.
Figure 64. CP3UB26/ISDN Controller Connections
CP3BT2 x
IOM-2 Mode
STD/SRD
SFS
B1
IOM-2 Channel 0
B2
Figure 63. IOM-2 Frame Structure
ISDN C ontroller
M
C
IC1
IOM-2 Frame (125 µs)
IOM-2 Channel 1
144
IC2
The IOM-2 interface has the following properties:
! Bit clock of 1536 kHz (output from the ISDN controller)
! Frame repetition rate of 8 ksps (output from the ISDN
! Double-speed bit clock (one data bit is two bit clocks
! B1 and B2 data use 8-bit log PCM format
! Long frame sync pulse
Figure 63 shows the structure of an IOM-2 Frame.
To connect the AAI to an ISDN controller through an IOM-2
compatible interface, the AAI needs to be configured in this
way:
! The AAI must be in IOM-2 Mode (AGCR.IOM2 = 1).
! The AAI operates in synchronous mode (AGCR.ASS =
! The AAI operates as a slave, therefore the bit clock and
! The frame sync length must be set to long frame sync
! The data word length must be set to 16-bit (AGCR.DWL
! The AAI must be set to normal mode (AGCR.SCS[1:0] =
! The internal frame rate must be 8 ksps (ACCR = 00BE).
19.6.5
In loopback mode, the STD and SRD pins are internally
connected together, so data shifted out through the ATSR
register will be shifted into the ARSR register. This mode
may be used for development, but it also allows testing the
transmit and receive path without external circuitry, for ex-
ample during Built-In-Self-Test (BIST).
M
controller)
wide)
0).
frame sync source selection must be set to external
(ACGR.IEFS = 1, ACGR.IEBC = 1).
(ACGR.FSS = 1).
= 1).
0).
C
Loopback Mode
IOM-2 Channel 2
C
DS162
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