SC1200UFH-266BF 33 AMD (ADVANCED MICRO DEVICES), SC1200UFH-266BF 33 Datasheet - Page 101
SC1200UFH-266BF 33
Manufacturer Part Number
SC1200UFH-266BF 33
Description
Manufacturer
AMD (ADVANCED MICRO DEVICES)
Datasheet
1.SC1200UFH-266BF_33.pdf
(443 pages)
Specifications of SC1200UFH-266BF 33
Lead Free Status / RoHS Status
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SuperI/O Module
5.4.2.3
Table 5-9 lists the configuration registers which affect the
Infrared Communication Port or Serial Port 3 (IRCP/SP3).
AMD Geode™ SC1200/SC1201 Processor Data Book
Index F0h
Index
F0h
30h
60h
61h
70h
71h
74h
75h
Bit
6:3
7
2
1
0
LDN 02h - Infrared Communication Port or
Serial Port 3
Description
Bank Select Enable. Enables bank switching.
0: All attempts to access the extended registers are ignored. (Default)
1: Enables bank switching.
Reserved.
Busy Indicator. (RO) This bit can be used by power management software to decide when to power-down the device.
0: No transfer in progress. (Default)
1: Transfer in progress.
Power Mode Control. When the logical device is active in:
0: Low power mode - Clock disabled. The output signals are set to their default states. Registers are maintained. (Unlike
1: Normal power mode - Clock enabled. The device is functional when the logical device is active. (Default)
TRI-STATE Control. When enabled and the device is inactive, the logical device output pins are in TRI-STATE. One excep-
tion is the IRTX/SOUT3 pin, which is driven to 0 when the Infrared Communication Port or Serial Port 3 is inactive and is not
affected by this bit.
0: Disabled. (Default)
1: Enabled (when the device is inactive).
Type
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Active bit in Index 30h that also prevents access to device registers.)
Configuration Register or Action
Activate. See also bit 0 of the SIOCF1 register.
Base Address MSB register. Bits [7:3] (for A[15:11]) are RO, 00000b.
Base Address LSB register. Bit [2:0] (for A[2:0]) are RO, 000b.
Interrupt Number.
Interrupt Type. Bit 1 is R/W; other bits are RO.
DMA Channel Select 0 (RX_DMA).
DMA Channel Select 1 (TX_DMA).
Infrared Communication Port/Serial Port 3 Configuration register.
Infrared Communication Port/Serial Port 3 Configuration Register (R/W)
Table 5-10. IRCP/SP3 Configuration Register
Table 5-9. Relevant IRCP/SP3 Registers
Only the last register (F0h) is described here (Table 5-10).
See Table 5-3 "Standard Configuration Registers" on page
95 for descriptions of the other registers listed.
32579B
Reset Value: 02h
Reset
Value
E8h
00h
03h
00h
03h
04h
04h
02h
101
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