TLE7230G-L Infineon Technologies, TLE7230G-L Datasheet - Page 11

• Manufacturer Part Number: TLE7230G-L
• Manufacturer: Infineon Technologies

Specifications of TLE7230G-L

• Switch Type: Low Side
• Power Switch Family: TLE7230G
• Input Voltage: -0.3 to 6V
• Power Switch On Resistance: 800mOhm
• Output Current: 1A
• Number Of Outputs: 8
• Mounting: Surface Mount
• Supply Current: 1mA
• Package Type: DSO
• Operating Temperature (min): -40C
• Operating Temperature (max): 150C
• Operating Temperature Classification: Automotive
• Pin Count: 24
• Lead Free Status / RoHS Status: Compliant

Register Description:
Input Mapping Rgister (MAP)
Defined to which outputs the IN4 / IN is assigned (can be one up to all)
Boolean operation Register (BOL)
The logic operation for serial and parallel control signal is defined for all channels individually
Overload Behavior Rgister (OVL)
The overload behavior of a single channel is defined.
Overtemperature Behavior Register (OVT)
The overtemperature behavior of a single channel is defined.
Switching Speed / Slew Rate Register (SLE)
The switching speed of the channels is defined
Output State Register (STA)
Reads back the state of the output (read only register)
Serial Output Control Register (CTL)
Sets the serial controll bits for switching the output stages.
SPI Diagnostics:
As soon as a fault occurs for longer than the fault filtering time, the fault information is latched into the
diagnosis register (and the Fault pin will change from high to low state). A new error on the same
channel will over-write the old error report. Serial data out pin (SO) is in a high impedance state when
CS is high. If CS receives a LOW signal, all diagnosis bits can be shifted out serially. If the sent com-
V1.1
Name
MAP
OVT
BOL
OVL
STA
SLE
CTL
Nr.
1
2
3
4
5
6
7
0.. No connection to IN4 / IN
1.. Output can be controlled with IN4 / IN pin
0.. Logic "OR"
1.. Logic "AND"
0.. Current limit without shutdown of the channel
1.. Current limit with latching overload shutdown of the channel
0.. Autorestart after cooling down
1.. Latching shutdown on overtemperature
0.. fast (10µs)
1.. slow (50µs)
0: DMOS off
1: DMOS on
0: Output off
1: Output on
OUT8
Ch8
Ch8
Ch8
Ch8
Ch8
Ch8
7
OUT7
Ch7
Ch7
Ch7
Ch7
Ch7
Ch7
6
OUT6
Ch6
Ch6
Ch6
Ch6
Ch6
Ch6
5
T a r g e t D a t a s h e e t T L E 7 2 3 0 R / G
OUT5
Ch5
Ch5
Ch5
Ch5
Ch5
Ch5
4
Page
OUT4
Ch4
Ch4
Ch4
Ch4
Ch4
Ch4
3
11
OUT3
Ch3
Ch3
Ch3
Ch3
Ch3
Ch3
2
OUT2
Ch2
Ch2
Ch2
Ch2
Ch2
Ch2
1
OUT1
Ch1
Ch1
Ch1
Ch1
Ch1
Ch1
0
ADDR
0 0 1
0 1 0
0 1 1
1 0 0
1 0 1
1 1 0
1 1 1
12. Oct. 2003
default
08
00
00
00
00
00
00
H
H
H
H
H
H
H