PIC24F16KA302-E/SP Microchip Technology, PIC24F16KA302-E/SP Datasheet - Page 94
![no-image](/images/manufacturer_photos/0/4/439/microchip_technology_sml.jpg)
PIC24F16KA302-E/SP
Manufacturer Part Number
PIC24F16KA302-E/SP
Description
16KB Flash, 2KB RAM, 512B EEPROM, 16 MIPS, 12-bit ADC, CTMU, XLP 28 SPDIP .300in
Manufacturer
Microchip Technology
Series
PIC® XLP™ 24Fr
Datasheet
1.PIC24F16KA301T-ISO.pdf
(320 pages)
Specifications of PIC24F16KA302-E/SP
Core Processor
PIC
Core Size
16-Bit
Speed
32MHz
Connectivity
I²C, IrDA, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, HLVD, POR, PWM, WDT
Number Of I /o
24
Program Memory Size
16KB (5.5K x 24)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 13x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
28-DIP (0.300", 7.62mm)
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
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PIC24FV32KA304 FAMILY
REGISTER 8-11:
REGISTER 8-12:
DS39995B-page 94
bit 1
bit 0
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15
bit 14
bit 13
bit 12
bit 11
bit 10
bit 9
bit 8-5
bit 4
bit 3
bit 2
U2TXIE
R/W-0
U-0
—
IC1IE: Input Capture Channel 1 Interrupt Enable bit
1 = Interrupt request is enabled
0 = Interrupt request is not enabled
INT0IE: External Interrupt 0 Enable bit
1 = Interrupt request is enabled
0 = Interrupt request is not enabled
U2TXIE: UART2 Transmitter Interrupt Enable bit
1 = Interrupt request is enabled
0 = Interrupt request is not enabled
U2RXIE: UART2 Receiver Interrupt Enable bit
1 = Interrupt request is enabled
0 = Interrupt request is not enabled
INT2IE: External Interrupt 2 Enable bit
1 = Interrupt request is enabled
0 = Interrupt request is not enabled
T5IE: Timer5 Interrupt Enable bit
1 = Interrupt request is enabled
0 = Interrupt request is not enabled
T4IE: Timer4 Interrupt Enable bit
1 = Interrupt request is enabled
0 = Interrupt request is not enabled
Unimplemented: Read as ‘0’
OC3IE: Output Compare 3 Interrupt Enable bit
1 = Interrupt request is enabled
0 = Interrupt request is not enabled
Unimplemented: Read as ‘0’
INT1IE: External Interrupt 1 Enable bit
1 = Interrupt request is enabled
0 = Interrupt request is not enabled
CNIE: Input Change Notification Interrupt Enable bit
1 = Interrupt request is enabled
0 = Interrupt request is not enabled
CMIE: Comparator Interrupt Enable bit
1 = Interrupt request is enabled
0 = Interrupt request is not enabled
U2RXIE
R/W-0
U-0
—
IEC0: INTERRUPT ENABLE CONTROL REGISTER 0
IEC1: INTERRUPT ENABLE CONTROL REGISTER 1
W = Writable bit
‘1’ = Bit is set
INT2IE
R/W-0
U-0
—
INT1IE
R/W-0
R/W-0
T5IE
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
R/W-0
R/W-0
CNIE
T4IE
R/W-0
CMIE
U-0
—
2011 Microchip Technology Inc.
x = Bit is unknown
MI2C1IE
OC3IE
R/W-0
R/W-0
SI2C1IE
R/W-0
U-0
—
bit 8
bit 0
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