PIC16F1828T-I/SS Microchip Technology, PIC16F1828T-I/SS Datasheet - Page 120
PIC16F1828T-I/SS
Manufacturer Part Number
PIC16F1828T-I/SS
Description
7 KB Flash, 256 Bytes RAM, 32 MHz Int. Osc, 18 I/0, Enhanced Mid Range Core 20 S
Manufacturer
Microchip Technology
Series
PIC® XLP™ 16Fr
Datasheets
1.PIC16F722-ISS.pdf
(8 pages)
2.PIC16F1824-ISL.pdf
(2 pages)
3.PIC16F1824-ISL.pdf
(419 pages)
4.PIC16F1824-ISL.pdf
(10 pages)
Specifications of PIC16F1828T-I/SS
Core Processor
PIC
Core Size
8-Bit
Speed
32MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
17
Program Memory Size
7KB (4K x 14)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
20-SSOP (0.200", 5.30mm Width)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
- PIC16F722-ISS PDF datasheet
- PIC16F1824-ISL PDF datasheet #2
- PIC16F1824-ISL PDF datasheet #3
- PIC16F1824-ISL PDF datasheet #4
- Current page: 120 of 419
- Download datasheet (4Mb)
PIC16(L)F1824/1828
REGISTER 11-6:
TABLE 11-3:
DS41419B-page 120
EECON1
EECON2
EEADRL
EEADRH
EEDATL
EEDATH
INTCON
PIE2
PIR2
Legend: — = unimplemented location, read as ‘0’. Shaded cells are not used by data EEPROM module.
bit 7
Legend:
R = Readable bit
S = Bit can only be set
‘1’ = Bit is set
bit 7-0
Name
W-0/0
*
Page provides register information.
EEPGD
OSFIE
OSFIF
Bit 7
GIE
—
—
Data EEPROM Unlock Pattern bits
To unlock writes, a 55h must be written first, followed by an AAh, before setting the WR bit of the
EECON1 register. The value written to this register is used to unlock the writes. There are specific
timing requirements on these writes. Refer to
Memory”
SUMMARY OF REGISTERS ASSOCIATED WITH DATA EEPROM
W-0/0
EECON2: EEPROM CONTROL 2 REGISTER
CFGS
PEIE
C2IE
Bit 6
C2IF
for more information.
—
W = Writable bit
x = Bit is unknown
‘0’ = Bit is cleared
EEPROM Control Register 2 (not a physical register)
W-0/0
TMR0IE
LWLO
Bit 5
C1IE
C1IF
EEPROM Control Register 2
W-0/0
FREE
Bit 4
INTE
EEIE
EEIF
Preliminary
EEADRL<7:0>
EEDATL<7:0>
EEADRH<6:0
WRERR
U = Unimplemented bit, read as ‘0’
-n/n = Value at POR and BOR/Value at all other Resets
BCL1IE
BCL1IF
IOCIE
Bit 3
EEDATH<5:0>
W-0/0
Section 11.2.2 “Writing to the Data EEPROM
TMR0IF
WREN
Bit 2
—
—
W-0/0
Bit 1
INTF
WR
—
—
2010 Microchip Technology Inc.
W-0/0
CCP2IE
CCP2IF
IOCIF
Bit 0
RD
Register
on Page
W-0/0
120*
119
118
118
118
118
93
95
98
bit 0
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