PRLXT9785BC.D0 S L7WP Intel, PRLXT9785BC.D0 S L7WP Datasheet - Page 176
PRLXT9785BC.D0 S L7WP
Manufacturer Part Number
PRLXT9785BC.D0 S L7WP
Description
Manufacturer
Intel
Datasheet
1.PRLXT9785BC.D0_S_L7WP.pdf
(234 pages)
Specifications of PRLXT9785BC.D0 S L7WP
Lead Free Status / RoHS Status
Compliant
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LXT9785 and LXT9785E Advanced 8-Port 10/100 Mbps PHY Transceivers
Table 57. 100BASE-TX Transceiver Characteristics
Table 58. 100BASE-FX Transceiver Characteristics
Peak differential output
voltage
Signal amplitude symmetry
Signal rise/fall time
Rise/fall time symmetry
Duty cycle distortion
Overshoot
Jitter magnitude (measured
differentially)
Peak-to-peak differential
output voltage
Signal rise/fall time
Jitter magnitude (measured
differentially)
Peak differential input
voltage
Common mode input range
Input Low Voltage (SD pins)
Input High Voltage (SD Pins)
1. Typical values are at 25 °C and are for design aid only; not guaranteed and not subject to production
2. Measured at the line side of the transformer, line replaced by 100 Ω (+/-1%) resistor.
1. Typical values are at 25 °C and are for design aid only; not guaranteed and not subject to production
2. 20 - 80 percent into 100 Ω equivalent load of a typical fiber transceiver.
testing.
testing.
Parameter
Parameter
V
V
Sym
DIFFP
t
V
V
CMIR
V
Sym
tx-jit
Vss
t
t
V
V
tx-jit
t
rf
IP
IH
IL
t
rfs
–
rf
O
P
-
P
-1.84
-1.04
0.55
V
V
Min
0.6
0.95
Min
–
–
–
CC
CC
98
3
–
–
–
–
Transmitter
Receiver
Typ
1.44
Typ
–
–
–
–
–
–
–
–
–
–
–
1
1
V
+/- 0.5
CC
Max
1.05
102
-1.63
-0.88
0.5
1.4
Max
V
V
1.8
1.4
5
5
–
–
CC
CC
- 0.5
Units
ns
ns
ns
ns
%
%
V
Units
ns
ns
V
V
V
V
V
Revision Date: 30-May-2006
Offset from 16 ns pulse
Document Number: 249241
width at 50% of pulse
Test Conditions
Test Conditions
Revision Number: 010
Note 2
Note 2
Note 2
Note 2
peak
Note 2
–
–
Datasheet
–
–
–
–
–
–
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