WBLXT9785EHC.D0 Intel, WBLXT9785EHC.D0 Datasheet - Page 175
WBLXT9785EHC.D0
Manufacturer Part Number
WBLXT9785EHC.D0
Description
Manufacturer
Intel
Datasheet
1.WBLXT9785EHC.D0.pdf
(221 pages)
Specifications of WBLXT9785EHC.D0
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LXT9785/LXT9785E
Datasheet
249241, Revision 11.0
16 April 2007
Table 61
Figure 40
Table 62
Cortina Systems
SMII - 100BASE-TX Receive Timing Parameters
SMII - 100BASE-TX Transmit Timing
SMII - 100BASE-TX Transmit Timing Parameters
®
RxData output delay from REFCLK
rising edge
RxData Rise/Fall Time
Receive start of /J/ to CRS asserted
Receive start of /T/ to CRS de-
asserted
SYNC setup to REFCLK rising edge
SYNC hold from REFCLK rising edge
1. Typical values are at 25 °C and are for design aid only; not guaranteed and not subject to production
2. “BT” signifies bit times at the line rate (that is, BT = 100 ns if using 10BASE-T, BT = 10 ns if using
Note:
SYNC setup to REFCLK rising edge and
TxData setup to REFCLK rising edge
SYNC hold from REFCLK rising edge and
TxData hold from REFCLK rising edge
TxEN sampled to start of /J/
1. Typical values are at 25 °C and are for design aid only; not guaranteed and not subject to production
2. “BT” signifies bit times at the line rate (that is, BT = 100 ns if using 10BASE-T, BT = 10 ns if using
Note:
LXT9785 and LXT9785E Advanced 8-Port 10/100 Mbps PHY Transceivers
testing.
100BASE-TX or 100BASE-FX).
testing.
100BASE-TX or 100BASE-FX).
The table latency values are derived with the hardware configuration pins FIFOSEL[1:0] set at a
default configuration of 00 (32 bits of initial fill).
The table latency values are derived with the hardware configuration pins FIFOSEL[1:0] set at a
default configuration of 00 (32 bits of initial fill).
REFCLK
TxData
SYNC
TPFO
Parameter
Parameter
t
1
t
2
Sym
t1
t2
t3
t4
t5
t6
t
3
Sym
t1
t2
t3
Min
1.5
1.5
1.0
–
–
–
Typ1
Min
1.5
1.0
1.0
21
25
–
–
–
–
Max
Typ1
t
29
30
1
5
–
–
–
11
–
–
t
2
Units
BT
BT
ns
ns
ns
ns
Max
18
2
2
–
–
Minimum C
Maximum C
Synchronous sampling of
SMII
Synchronous sampling of
SMII
6.0 Test Specifications
Units
BT
ns
ns
Test Conditions
2
L
L
= 5 pF
–
–
–
= 20 pF
Conditions
Test
Page 175
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