WJLXT972MLC.A4 S L7U9 Intel, WJLXT972MLC.A4 S L7U9 Datasheet - Page 86
WJLXT972MLC.A4 S L7U9
Manufacturer Part Number
WJLXT972MLC.A4 S L7U9
Description
Manufacturer
Intel
Datasheet
1.WJLXT972MLC.A4_S_L7U9.pdf
(92 pages)
Specifications of WJLXT972MLC.A4 S L7U9
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86
Table 53. Status Change Register - Address 19, Hex 13
®
LXT972M Single-Port 10/100 Mbps PHY Transceiver
Table 53
19.15:9
19.8
19.7
19.6
19.5
19.4
19.3
19.2
19.1
19.0
1. R/W = Read/Write, RO = Read Only, SC = Self Clearing.
Bit
lists status change bits.
Reserved
Reserved
ANDONE
SPEEDCHG
DUPLEXCHG
LINKCHG
Reserved
Reserved
Reserved
Reserved
Name
Ignore on Read.
Auto-negotiation Status
0 = Auto-negotiation has not completed.
1 = Auto-negotiation has completed.
Speed Change Status
0 = A Speed Change has not occurred since last
1 = A Speed Change has occurred since last
Duplex Change Status
0 = A Duplex Change has not occurred since last
1 = A Duplex Change has occurred since last
Link Status Change Status
0 = A Link Change has not occurred since last
1 = A Link Change has occurred since last reading
Ignore on Read.
Ignore on Read.
Ignore on Read.
Ignore on Read.
Ignore on Read.
reading this register.
reading this register.
reading this register.
reading this register.
reading this register.
this register.
Description
Document Number: 302875-005
Revision Date: 27-Oct-2005
Type
RO/
RO/
RO/
RO/
RO
RO
RO
RO
RO
RO
SC
SC
SC
SC
1
Datasheet
Default
N/A
N/A
0
0
0
0
0
0
0
0
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