TXC-06880BIOG Transwitch Corporation, TXC-06880BIOG Datasheet - Page 63

• Manufacturer Part Number: TXC-06880BIOG
• Manufacturer: Transwitch Corporation

Specifications of TXC-06880BIOG

• Operating Supply Voltage (typ): 1.8/3.3V
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Lead Free Status / RoHS Status: Not Compliant

PRELIMINARY TXC-06880-MB, Ed. 4
February 2005
6.2 SPI-3 TO SMII/GMII FLOW FUNCTIONAL OPERATION
Destination Address
Destination
6.2.1 SPI-3 Input Operation
(6 bytes)
Address
6.2.1.1 Input SPI-3 Data Flow:
6.2.1.2 Oversubscription Mode
(6 bytes)
VLAN Tag Frame format at SPI-3 Output Interface
At the SPI-3 input interface, frames are transferred from the Link or PHY layer device to the
Envoy-CE2. An Envoy-CE2 channel is selected for data transfer, by the Link or PHY layer
device. In PHY layer mode, the Link layer device monitors the “Buffer Space Available”
signals, STPA/PTPA and selects an Envoy-CE2 channel for data transfer, based on the
Transmit packet available signals (STPA and PTPA). In Link layer mode, the PHY layer
device transfers frame based on Envoy-CE2’s read enable signal. Once a data transfer
begins, the Link/PHY layer device qualifies the frame data being transferred into the
channel’s Egress FIFO, with the read enable/data valid signal. The “Buffer Space Available”
signals reflect the full status of the channel’s Egress FIFO and get de-asserted when the
associated Egress FIFO becomes near full (near full level is programmable). When the
Egress FIFO is configured for Store and Forward mode, frames received with the SPI-3 error
pin asserted, will be either discarded or errored and a count of the discarded and errored
frames is kept.
When the egress FIFO is configured for Store and Forward mode, frames received with the
SPI-3 error pin asserted are discarded and will not show up on the Ethernet port. When the
egress FIFO is configured for Streaming mode, frames received with the SPI-3 error pin
asserted will show up on the Ethernet port with an additional four bytes of bad CRC
appended to it.
The SPI-3 Input interface is designed to support an Oversubscription mode. In this mode, the
far end SPI-3 Slave or Master device can ignore the backpressure exerted by the Envoy-CE2
SPI-3 Master or Slave. Since the backpressure is being ignored, it is possible that the per-
PHY Egress FIFOs can be filled to overflow. When a PHY’s Egress FIFO is filled, data from
the Input SPI-3 data bus will still be clocked into the Envoy-CE2, but it will not be written into
the PHY’s Egress FIFO. This allows the SPI-3 bus to still run and service the PHYs whose
buffers are not full.
Regardless of the Egress FIFO configuration for Store and Forward mode or Streaming
mode, all complete packets received on the SPI-3 port for a full PHY will be discarded and
Frame with Extension Field at SPI-3 Output Interface
Source Address
(6 bytes)
Source Address
(6 bytes)
VLAN Tag
(4 bytes)
- Operation -
Length/Type
(2 bytes)
Length/Type
(2 bytes)
(46 to 1500 bytes)
Data
(46 to 1500 bytes)
Data
Frame Check
Sequence
(4 bytes)
Envoy-CE2 Device
Frame Check
Sequence
(4 bytes)
DATA SHEET
Extension
TXC-06880
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