TXC-06880BIOG Transwitch Corporation, TXC-06880BIOG Datasheet - Page 61

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TXC-06880BIOG

Manufacturer Part Number
TXC-06880BIOG
Description
Manufacturer
Transwitch Corporation
Datasheet

Specifications of TXC-06880BIOG

Operating Supply Voltage (typ)
1.8/3.3V
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Lead Free Status / RoHS Status
Not Compliant

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Part Number
Manufacturer
Quantity
Price
Part Number:
TXC-06880BIOG
Manufacturer:
SAMWHA
Quantity:
34 000
PRELIMINARY TXC-06880-MB, Ed. 4
February 2005
6.1.4 Ingress FIFO Operations
6.1.4.1 Ingress FIFO Write:
6.1.4.2 Ingress FIFO Read:
6.1.4.3 Ingress FIFO Frame Availability for Transfer (Store and Forward/Streaming):
Frames once qualified by the Receive MAC are written into the Ingress FIFO of the
appropriate channel. The Ingress FIFO for each channel is 7.75 KBytes deep in SMII mode,
62 KBytes deep in GMII mode, and 31 KBytes deep in extended SMII mode. The ingress
FIFO is an integral part of Envoy-CE2 IEEE 802.3 compliant Flow control mechanism, which
is used to backpressure the Ethernet interface. When the Ingress FIFO starts becoming full,
the flow control is activated (if enabled) and the device transmitting the Ethernet traffic is
backpressured. A complete description of the procedure is outlined in section
Duplex” on page
indication and attempts to overflow the Ingress FIFO, the Envoy-CE2 will truncate the frame
being received during the overflow condition. Frames received when the Ingress FIFO is in an
overflow condition are discarded and the number of discarded frames are counted. In Half
Duplex mode, the backpressure mechanism used is the “Raise Carrier” method, which is
described in section Ethernet
Frames are read out from the Ingress FIFO by the SPI-3 interface. Since the SPI-3 interface
aggregates the traffic from the channels, a channel selection is required. The selection of the
Ingress FIFO (or channel selection) for frame reads, is done by the SPI-3 interface. For
SPI-3, the selection is done by the scheduler in the Envoy-CE2 SPI-3 interface block. The
scheduler uses a round robin selection scheme.
Frame data stored in the Ingress FIFO will be made available for transfer on the SPI-3
interface, depending on two selectable modes of operation:
• Count of frames received with an invalid FCS and length less than 64 bytes (32 bit)
• Count of frames received with an invalid FCS and total byte count is between 64 and
• Count of frames received with an invalid FCS and total byte count is between 1519 and
• Count of frames dropped by the receive MAC due to Ingress FIFO full (32 bit)
• Count of frames dropped by the receive MAC due to Unicast and Source address
• Count of VLAN tagged frames received (32 bit)
• Six sets of counts for frame sizes that fall in a certain range. The ranges are 64 bytes, 65
• Count of frames received with the RX_ER asserted by the PHY during transmission (32
• Count of frames received with length error (32 bit)
• Store and Forward Mode: When a complete frame has been written into the Ingress
maximum frame length (32 bit)
1518 bytes (32 bit)
maximum frame length (32 bit)
mismatch (32 bit)
to 127 bytes, 128 to 255 bytes, 256 to 511 bytes, 512 to 1023 bytes, and 1024 to 1518
bytes.
bit)
71. If the Ethernet device transmitting frames, ignores the backpressure
- Operation -
“Half-Duplex Flow Control” on page
71.
Envoy-CE2 Device
DATA SHEET
“Ethernet Full
TXC-06880
61 o f 12 2

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