4309-52 Peregrine Semiconductor, 4309-52 Datasheet - Page 2

• Manufacturer Part Number: 4309-52
• Description: IC DSA 5BIT 50 OHM 20-QFN
• Manufacturer: Peregrine Semiconductor
• Series: UltraCMOS™r

Specifications of 4309-52

• Attenuation Value: 31.5dB
• Tolerance: ±0.15dB
• Frequency Range: 0 ~ 4GHz
• Impedance: 50 Ohm
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 1046-1036-2

Figure 3. Pin Configuration (Top View)
Table 2. Pin Descriptions
Notes: 5. For improved RF performance these No Connect pins can
Exposed Solder Pad Connection
The exposed solder pad on the bottom of the package
must be grounded for proper device operation.
©2007 Peregrine Semiconductor Corp. All rights reserved.
Page 2 of 9
Pin No.
Paddle
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
1
2
3
4
5
6
7
8
9
ACG
VDD
N/C
N/C
RF1
N/C
6. Pins can either be grounded directly or through coupling
7. Pin can either be grounded or No Connect
capacitors
be connected to RF ground.
2
3
4
5
1
6
Pin Name
ACG
ACG
ACG
ACG
ACG
ACG
ACG
GND
N/C
N/C
N/C
N/C
N/C
N/C
C0.5
RF1
RF2
N/C
N/C
C16
V
C8
C4
C2
C1
DD
5
7
5
5
5
5
6
6
6
6
6
6
6
Exposed
Ground
Paddle
No Connect
Power supply pin
No Connect
RF port
No Connect
AC Ground connection
AC Ground connection
AC Ground connection
AC Ground connection
AC Ground connection
AC Ground connection
No Connect
AC Ground connection
No Connect
RF port
No Connect
No Connect
No Connect
Attenuation control bit, 16 dB
Attenuation control bit, 8 dB
Attenuation control bit, 4 dB
Attenuation control bit, 2 dB
Attenuation control bit, 1 dB
Attenuation control bit, 0.5 dB
Ground for proper operation
14
13
Description
18
17
16
15
ACG
RF2
N/C
N/C
N/C
N/C
Table 3. Operating Ranges
Table 4. Absolute Maximum Ratings
Electrostatic Discharge (ESD) Precautions
When handling this UltraCMOS™ device, observe the
same precautions that you would use with other ESD-
sensitive devices. Although this device contains
circuitry to protect it from damage due to ESD,
precautions should be taken to avoid exceeding the
rate specified in Table 4.
Latch-Up Avoidance
Unlike conventional CMOS devices, UltraCMOS™
devices are immune to latch-up.
Table 5. Control Voltage
The standard 3V or 5V CMOS control logic is
independent of supply voltage.
Table 6. Truth Table
V
Voltage
I
Current
P
C16
DD
Symbol
DD
IN
1
1
1
1
1
1
0
0
Input power (50Ω)
Power Supply
V
V
T
Power Supply
T
P
V
ESD
OP
DD
ST
IN
Parameter
I
Document No. 70-0218-06
C8
State
1
1
1
1
1
0
1
0
High
Low
Power supply voltage
Voltage on any DC input
Storage temperature range
Operating temperature
range
Input power (50Ω)
ESD voltage (Human Body
Model)
Parameter/Conditions
C4
1
1
1
1
0
1
1
0
C2
1
1
1
0
1
1
1
0
Min
3.0
C1
+2.0 to +5 Vdc at 10 µA (typ)
1
1
0
1
1
1
1
0
0 to +1.0 Vdc at 2 µA (typ)
│ UltraCMOS™ RFIC Solutions
Bias Condition
C0.5 Attenuation State
Typ
100
3.3
1
0
1
1
1
1
1
0
Min
-0.3
-0.3
-65
-40
Product Specification
Reference Loss (IL)
Max
250
+24
5.5
Max
2000
150
6.0
6.0
85
30
31.5 dB
0.5 dB
16 dB
1 dB
2 dB
4 dB
8 dB
PE4309
Units
dBm
Units
dBm
µA
V
°C
°C
V
V
V