ISPLSI 5512VE-155LF388 LATTICE SEMICONDUCTOR, ISPLSI 5512VE-155LF388 Datasheet - Page 6

• Manufacturer Part Number: ISPLSI 5512VE-155LF388
• Description: CPLD ispLSI® 5000VE Family 24K Gates 512 Macro Cells 155MHz EECMOS Technology 3.3V 388-Pin FBGA
• Manufacturer: LATTICE SEMICONDUCTOR

Specifications of ISPLSI 5512VE-155LF388

• Package: 388FBGA
• Family Name: ispLSI® 5000VE
• Device System Gates: 24000
• Number Of Macro Cells: 512
• Maximum Propagation Delay Time: 8 ns
• Number Of User I/os: 256
• Number Of Logic Blocks/elements: 16
• Typical Operating Supply Voltage: 3.3 V
• Maximum Operating Frequency: 155 MHz
• Number Of Product Terms Per Macro: 35
• Operating Temperature: 0 to 70 °C

Figure 3. ispLSI 5000VE Generic Logic Block (GLB)
PT 160
PT 161
PT 162
PT 159
PT 158
PT 157
PT 156
PT 155
PT 79
PT 78
PT 77
PT 76
PT 75
PT 0
PT 1
PT 2
PT 3
PT 4
PT 9
PT 8
PT 7
PT 6
PT 5
0 1 2
From GRP
66 67
PTSA
6
Specifications ispLSI 5512VE
Global PTOE Bus
4
4
4
4
Global PTOE 0 ... 3
Global PTOE 0 ... 3
Global PTOE 0 ... 3
From PTSA
PTSA bypass
PTOE
PT Clock
PT Reset
PT Preset
Shared PT Clock
Shared PT Reset
Global PTOE 0 ... 3
From PTSA
PTSA bypass
PTOE
PT Clock
PT Reset
PT Preset
Shared PT Clock
Shared PT Reset
From PTSA
PTSA bypass
PTOE
PT Clock
PT Reset
PT Preset
Shared PT Clock
Shared PT Reset
From PTSA
PTSA bypass
PTOE
PT Clock
PT Reset
PT Preset
Shared PT Clock
Shared PT Reset
Macrocell 15
Macrocell 31
Macrocell 0
Macrocell 1
To I/O Pad
To GRP
To I/O Pad
To GRP
To I/O Pad
To GRP
To I/O Pad
To GRP