ISPLSI 5512VE-155LF388 LATTICE SEMICONDUCTOR, ISPLSI 5512VE-155LF388 Datasheet - Page 20

• Manufacturer Part Number: ISPLSI 5512VE-155LF388
• Description: CPLD ispLSI® 5000VE Family 24K Gates 512 Macro Cells 155MHz EECMOS Technology 3.3V 388-Pin FBGA
• Manufacturer: LATTICE SEMICONDUCTOR

Specifications of ISPLSI 5512VE-155LF388

• Package: 388FBGA
• Family Name: ispLSI® 5000VE
• Device System Gates: 24000
• Number Of Macro Cells: 512
• Maximum Propagation Delay Time: 8 ns
• Number Of User I/os: 256
• Number Of Logic Blocks/elements: 16
• Typical Operating Supply Voltage: 3.3 V
• Maximum Operating Frequency: 155 MHz
• Number Of Product Terms Per Macro: 35
• Operating Temperature: 0 to 70 °C

1. NC pins are not to be connected to any active signals, VCC or GND.
Signal Descriptions
TMS
TCK
TDI
TDO
TOE / I/O0
GOE0, GOE1
RESET
I/O
GND
NC
VCC
CLK0, CLK1
CLK2 / I/O,
CLK3 / I/O
VCCIO
Signal Name
1
Input - This pin is the Test Mode Select input, which is used to control the JTAG state machine.
Input - This pin is the Test Clock input pin used to clock through the JTAG state machine.
Input - This pin is the JTAG Test Data In pin used to load data.
Output - This pin is the JTAG Test Data Out pin used to shift data out.
Input/Output - This pin functions as either the Test Output Enable pin or an I/O pin based upon
customer's design. TOE tristates all I/O pins when a logic low is driven.
Input - These two pins are the Global Output Enable input pins.
Dedicated Reset Input - This pin resets all registers in the device. The global polarity (active
high or low input) for this pin is selectable.
Input/Output – These are the general purpose I/O used by the logic array.
Ground
No connect.
Vcc
Dedicated clock inputs for all registers. Both clocks are muxed before being used as the clock
input to all registers in the device.
Input/Output - These pins share functionality. They can be used as dedicated clock inputs for
all registers, as well as I/O pins.
Input - This pin is used for optional 2.5V outputs. Every I/O can independently select either 3.3V
or the optional voltage as its output level. If the optional output voltage is not required, this pin
must be connected to the Vcc supply. Programmable pull-up resistors and bus-hold latches
only draw current from this supply.
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Description
Specifications ispLSI 5512VE