OXPCIE200-TAAG PLX Technology, OXPCIE200-TAAG Datasheet

OXPCIE200-TAAG

Manufacturer Part Number

OXPCIE200-TAAG

Description

PCI Express Multi Port Bridge 156-Pin TAPP

Manufacturer

PLX Technology

Datasheet

1.EK-OXPCIE200.pdf (2 pages)

Specifications of OXPCIE200-TAAG

Package

156TAPP

Operating Temperature

-40 to 85 Â°C

Current page: 1 of 2
Download datasheet (153Kb)

Highlights

General Features

o Dual USB 2.0 host ports or USB 2.0 host port &

o PCIe x1 end-point

o 9 x 9mm

o Typical Power: 300 mWatts

Key Features

o Standards Compliant

o High Performance

o Flexibility

o Robust Operation

o Broad Device Driver Support

SPI/SRAM port, both with UART port configuration

- Integrated 2.5 GT/s SerDes

- PCI Express Base Specification, r1.1 (backwards

- PCI Power Management Spec, r1.2

- ExpressCard, Mini Card & AIC compatible

- MSI/MSI-X compatible

- ASPM (L0S, L1) Link power management

- EHCI/OHCI compliant USB 2.0 ports

- Integrated USB2.0 full speed Phy

- Master or slave mode SPI or SRAM port

- Data rates of 60Mbps (SPI) & 25MB/s (SRAM)

- 8KB slave memory with direct access or 16 channel

- PLX’s Oxford 950 UART

- DMA/bus mastering of both UARTs

- Asynchronous baud rates up to 15 Mbps

- 128-byte deep transmit/receive FIFO

- 9, 8, 7, 6 & 5-bit data framing

- Automated in & out-of-band flow control

- Advanced FIFO fill management

- RS232, RS422, RS485 and IrDA operation

- Flexible clock pre-scaler from 1 to 31.875

- Programmable RS485 Turn-around delay

- 450 through 950 software compatibility

- 8 user-configurable GPIOs/PWMs

- Device parameters configurable via EEPROM

- 1.8V, 2.5V or 3.3V UART & GPIO I/O voltage

- Operation from a single 3.3 V supply

- Industrial temperature range -40°C to 85°C

- Windows 7/Vista/XP/2K

- WinCE 4.2/5.0/6.0

- Linux 2.4/2.6

compatible with PCIe r1.0a)

FIFO modes

, 156-pin TAPP package

Page 1 of 2

OXPCIe200, PCI Express multi-port bridge

Part of the Expresso family of high performance PCI

Express devices, the OXPCIe200 is a single chip

multi-port bridge with a rich set of connectivity ports

and advanced system management to maximize data

throughput while substantially reducing CPU and

system loading.

A fully integrated, single lane PCI Express endpoint

controller and SerDes enables host system access to

USB2.0 host, SPI and SRAM ports, a PLX

Technology’s ultra high performance Oxford 950

UART, plus user defined GPIOs/PWMs. The device

is configurable as dual USB host ports or one USB2.0

host port & one SPI or SRAM port providing a high

throughput communication path from a PCI Express

host system to a slave processor or peripherals.

Complete with the Oxide development tools and

certified device drivers, the OXPCIe200 is easy to

design-in and the ideal connectivity solution for a

diverse range of products including: inter-processor

communication, device control, I/O expansion and

multi-modem ExpressCard modules.

Accelerate your product development and time to

market with Oxide and PLX Technology’s easy to

design-in, high performance serial connectivity

solutions that just work.

7/10/2009, Version 1.1

Related parts for OXPCIE200-TAAG

OXPCIE200-TAAG Summary of contents

Page 1

... PCI Express host system to a slave processor or peripherals. Complete with the Oxide development tools and certified device drivers, the OXPCIe200 is easy to design-in and the ideal connectivity solution for a diverse range of products including: inter-processor communication, device control, I/O expansion and multi-modem ExpressCard modules ...

Page 2

... Check the PLX website for details. Ordering Information Part Number Description OXPCIe200-TAAG PCI Express Multi-Port Bridge EK-OXPCIe200 Reference Design Kit ...

Related keywords

OXPCIE200-TAAG datasheet
OXPCIE200-TAAG data sheet
OXPCIE200-TAAG pdf datasheet
OXPCIE200-TAAG component
OXPCIE200-TAAG part
OXPCIE200-TAAG distributor
OXPCIE200-TAAG RoHS
OXPCIE200-TAAG datasheet download