FQD10N20CTM Fairchild Semiconductor, FQD10N20CTM Datasheet

MOSFET N-CH 200V 7.8A DPAK

FQD10N20CTM

Manufacturer Part Number
FQD10N20CTM
Description
MOSFET N-CH 200V 7.8A DPAK
Manufacturer
Fairchild Semiconductor
Series
QFET™r
Datasheets

Specifications of FQD10N20CTM

Fet Type
MOSFET N-Channel, Metal Oxide
Fet Feature
Standard
Rds On (max) @ Id, Vgs
360 mOhm @ 3.9A, 10V
Drain To Source Voltage (vdss)
200V
Current - Continuous Drain (id) @ 25° C
7.8A
Vgs(th) (max) @ Id
4V @ 250µA
Gate Charge (qg) @ Vgs
26nC @ 10V
Input Capacitance (ciss) @ Vds
510pF @ 25V
Power - Max
50W
Mounting Type
Surface Mount
Package / Case
DPak, TO-252 (2 leads+tab), SC-63
Configuration
Single
Transistor Polarity
N-Channel
Resistance Drain-source Rds (on)
0.36 Ohm @ 10 V
Drain-source Breakdown Voltage
200 V
Gate-source Breakdown Voltage
+/- 30 V
Continuous Drain Current
7.8 A
Power Dissipation
50000 mW
Maximum Operating Temperature
+ 150 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 55 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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©2009 Fairchild Semiconductor Corporation
FQD10N20C / FQU10N20C
200V N-Channel MOSFET
General Description
These N-Channel enhancement mode power field effect
transistors are produced using Fairchild’s proprietary,
planar stripe, DMOS technology.
This advanced technology has been especially tailored to
minimize on-state resistance, provide superior switching
performance, and withstand high energy pulse in the
avalanche and commutation mode. These devices are well
suited for high efficiency switching DC/DC converters,
switch mode power supplies, DC-AC converters for
uninterrupted power supplies and motor controls.
Absolute Maximum Ratings
Thermal Characteristics
* When mounted on the minimum pad size recommended (PCB Mount)
V
I
I
V
E
I
E
dv/dt
P
T
T
R
R
R
D
DM
AR
J
L
Symbol
DSS
GSS
AS
AR
D
Symbol
, T
JC
JA
JA
STG
G
Drain-Source Voltage
Drain Current
Drain Current
Gate-Source Voltage
Single Pulsed Avalanche Energy
Avalanche Current
Repetitive Avalanche Energy
Peak Diode Recovery dv/dt
Power Dissipation (T
Operating and Storage Temperature Range
Maximum lead temperature for soldering purposes,
1/8" from case for 5 seconds
Thermal Resistance, Junction-to-Case
Thermal Resistance, Junction-to-Ambient*
Thermal Resistance, Junction-to-Ambient
S
D-PAK
FQD Series
D
- Continuous (T
- Continuous (T
- Pulsed
- Derate above 25°C
C
Parameter
= 25°C)
Parameter
G
T
C
D
C
C
= 25°C unless otherwise noted
= 25°C)
= 100°C)
S
(Note 1)
(Note 2)
(Note 1)
(Note 1)
(Note 3)
Features
• 7.8A, 200V, R
• Low gate charge ( typical 20 nC)
• Low Crss ( typical 40.5 pF)
• Fast switching
• 100% avalanche tested
• Improved dv/dt capability
• RoHS Compliant
I-PAK
FQU Series
FQD10N20C / FQU10N20C
DS(on)
Typ
--
--
--
-55 to +150
= 0.36
31.2
210
300
200
7.8
5.0
7.8
5.0
5.5
0.4
50
30
G
@V
! ! ! !
! ! ! !
Max
110
2.5
50
GS
January 2009
QFET
◀ ◀ ◀ ◀
◀ ◀ ◀ ◀
= 10 V
! ! ! !
! ! ! !
! ! ! !
! ! ! !
D
S
● ●
● ●
● ●
● ●
● ●
● ●
▲ ▲ ▲ ▲
▲ ▲ ▲ ▲
Rev. A2, January 2009
Units
W/°C
Units
°C/W
°C/W
°C/W
V/ns
mJ
mJ
°C
°C
W
V
A
A
A
V
A
®

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FQD10N20CTM Summary of contents

Page 1

... Thermal Resistance, Junction-to-Ambient Thermal Resistance, Junction-to-Ambient JA * When mounted on the minimum pad size recommended (PCB Mount) ©2009 Fairchild Semiconductor Corporation Features • 7.8A, 200V, R • Low gate charge ( typical 20 nC) • Low Crss ( typical 40.5 pF) • Fast switching • 100% avalanche tested • ...

Page 2

... Repetitive Rating : Pulse width limited by maximum junction temperature 5.2mH 7.8A 50V 9.5A, di/dt 300A Starting DSS, 4. Pulse Test : Pulse width 300 s, Duty cycle 5. Essentially independent of operating temperature ©2009 Fairchild Semiconductor Corporation T = 25°C unless otherwise noted C Test Conditions 250 250 A, Referenced to 25° 200 160 125° ...

Page 3

... Drain Current and Gate Voltage 1200 1000 800 C iss C oss 600 C 400 rss ※ Note ; 200 MHz Drain-Source Voltage [V] DS Figure 5. Capacitance Characteristics ©2009 Fairchild Semiconductor Corporation 1 10 150 ※ Notes : 1. 250 μ s Pulse Test ℃ Figure 2. Transfer Characteristics 20V 10 GS ※ ...

Page 4

... Notes : 150 Single Pulse - Drain-Source Voltage [V] DS Figure 9. Maximum Safe Operating Area ©2009 Fairchild Semiconductor Corporation 3.0 2.5 2.0 1.5 1.0 ※ Notes : 0 250 μ 0.0 -100 100 150 200 o C] Figure 8. On-Resistance Variation 10 8 100 Figure 10. Maximum Drain Current ※ ...

Page 5

... Resistive Switching Test Circuit & Waveforms 10V 10V Unclamped Inductive Switching Test Circuit & Waveforms 10V 10V ©2009 Fairchild Semiconductor Corporation Gate Charge Test Circuit & Waveform Same Type Same Type as DUT as DUT 10V 10V DUT DUT 10% 10 DUT DUT ...

Page 6

... Peak Diode Recovery dv/dt Test Circuit & Waveforms Driver ) ( Driver ) DUT ) ( DUT ) DUT ) ( DUT ) ©2009 Fairchild Semiconductor Corporation + + DUT DUT Driver Driver Same Type Same Type as DUT as DUT • dv/dt controlled by R • dv/dt controlled by R • I • I controlled by pulse period ...

Page 7

... Package Dimensions TO-252 (DPAK) (FS PKG Code 36) ©2009 Fairchild Semiconductor Corporation 1:1 Scale 1:1 on letter size paper Dimensions shown below are in: millimeters Part Weight per unit (gram): 0.33 Rev. A2, January 2009 ...

Page 8

... Package Dimensions 6.80 6.35 5.54 5. (0.60) 0.88 0.64 0. PLCS ©2009 Fairchild Semiconductor Corporation I - PAK Scale 1:1 on letter size paper Dimensions shown below are in: Part Weight per unit (gram): 0.44 A 1.27 0.50 6.30 5.90 1.52 0.70 2.28 1.60 3 1.14 0.76 9.65 8.90 2 ...

Page 9

... TRADEMARKS The following includes registered and unregistered trademarks and service marks, owned by Fairchild Semiconductor and/or its global subsidiaries, and is not intended exhaustive list of all such trademarks. Build it Now™ CorePLUS™ CorePOWER™ CROSSVOLT™ CTL™ Current Transfer Logic™ ...

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