FDMC5614P Fairchild Semiconductor, FDMC5614P Datasheet - Page 2

• Manufacturer Part Number: FDMC5614P
• Description: MOSFET P-CH 60V 5.7A POWER33
• Manufacturer: Fairchild Semiconductor
• Series: PowerTrench®r

Specifications of FDMC5614P

• Fet Type: MOSFET P-Channel, Metal Oxide
• Fet Feature: Logic Level Gate
• Rds On (max) @ Id, Vgs: 100 mOhm @ 5.7A, 10V
• Drain To Source Voltage (vdss): 60V
• Current - Continuous Drain (id) @ 25° C: 5.7A
• Vgs(th) (max) @ Id: 3V @ 250µA
• Gate Charge (qg) @ Vgs: 20nC @ 10V
• Input Capacitance (ciss) @ Vds: 1055pF @ 30V
• Power - Max: 2.1W
• Mounting Type: Surface Mount
• Package / Case: 8-MLP, Power33
• Configuration: Single Quad Drain Triple Source
• Transistor Polarity: P-Channel
• Resistance Drain-source Rds (on): 0.084 Ohms
• Drain-source Breakdown Voltage: - 60 V
• Gate-source Breakdown Voltage: +/- 20 V
• Continuous Drain Current: 13.5 A
• Power Dissipation: 2.1 W
• Maximum Operating Temperature: + 150 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 55 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: FDMC5614PTR

FDMC5614P Rev.C1
Notes:
1: R
2: Pulse Test: Pulse Width < 300μs, Duty cycle < 2.0%.
Dynamic Characteristics
Electrical Characteristics
Off Characteristics
On Characteristics
Switching Characteristics
Drain-Source Diode Characteristics
BV
ΔBV
I
I
V
r
g
C
C
C
t
t
t
t
Q
Q
Q
V
t
Q
ΔV
DSS
GSS
d(on)
r
d(off)
f
rr
DS(on)
(a)R
(b)R
FS
GS(th)
SD
iss
oss
rss
ΔT
ΔT
g(TOT)
gs
gd
rr
user's board design.
Symbol
θJA
DSS
GS(th)
DSS
J
J
θJA
θJA
is determined with the device mounted on a 1 in
= 60°C/W when mounted on a 1 in
= 135°C/W when mounted on a minimum pad of 2 oz copper.
Drain to Source Breakdown Voltage
Breakdown Voltage Temperature
Coefficient
Zero Gate Voltage Drain Current
Gate to Source Leakage Current
Gate to Source Threshold Voltage
Gate to Source Threshold Voltage
Temperature Coefficient
Static Drain to Source On Resistance
Forward Transconductance
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Total Gate Charge at 10V
Gate to Source Gate Charge
Gate to Drain “Miller” Charge
Source to Drain Diode Forward Voltage
Reverse Recovery Time
Reverse Recovery Charge
Parameter
2
pad of 2 oz copper, 1.5’x1.5’x0.062’ thick PCB.
a. 60°C/W when mounted on
a 1 in
T
2
J
2
oz copper pad on a 1.5 x 1.5 in. board of FR-4 material. R
pad of 2 oz copper
= 25°C unless otherwise noted
V
V
V
V
V
I
V
f = 1MHz
I
I
V
V
V
I
V
V
V
V
I
F
D
D
D
D
GS
DD
GS
GS
DD
DS
DS
GS
GS
GS
GS
GS
DS
= -3.2A, di/dt = 100A/μs
= -250μA, V
= -250μA, referenced to 25°C
= -250μA, referenced to 25°C
= -5.7A
= -10V
= 0V, I
= -30V, V
= -30V, I
= -10V, R
= -30V
= -48V, V
= -15V, I
= ±20V, V
= V
= -10V, I
= -4.5V, I
= -10V, I
DS
2
Test Conditions
, I
S
= -3.2A
D
D
D
D
D
GS
GS
GEN
GS
DS
= -1A
D
= -250μA
= -5.7A
= -5.7A , T
= -5.7A
= -4.4A
= 0V,
= 0V
= 0V
= 0V
= 6Ω
J
= 125°C
θJC
is guaranteed by design while R
b.135°C/W when mounted on a
minimum pad of 2 oz copper
Min
-60
-1
-1.95
Typ
-0.8
1.6
2.7
-54
108
140
795
140
10
32
15
4.7
11
11
84
60
11
θJA
±100
Max
1055
-1.2
is determined by the
100
135
168
185
2.1
3.5
www.fairchildsemi.com
-1
21
23
65
22
20
36
29
90
-3
mV/°C
mV/°C
Units
mΩ
μA
nA
nC
pF
pF
pF
nC
nC
nC
ns
ns
ns
ns
ns
V
V
S
V