GTL2009PW NXP Semiconductors, GTL2009PW Datasheet

Comparator ICs 3-BIT FSB FREQ CMPR

GTL2009PW

Manufacturer Part Number
GTL2009PW
Description
Comparator ICs 3-BIT FSB FREQ CMPR
Manufacturer
NXP Semiconductors
Datasheet

Specifications of GTL2009PW

Number Of Channels
3 Channels
Comparator Type
Magnitude
Product
Digital Comparators
Output Type
Complementary
Supply Voltage (max)
3.6 V
Supply Voltage (min)
3 V
Supply Current (max)
10 mA
Maximum Operating Temperature
85 C
Mounting Style
SMD/SMT
Package / Case
SOT-403
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
GTL2009PW,112

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
GTL2009PW
Manufacturer:
PHILIPS/飞利浦
Quantity:
20 000
1. General description
2. Features
The GTL2009 is designed for the Nocona and Dempsey/Blackford dual Intel Xeon
processor platforms to compare the Front-Side Bus (FSB) frequency settings and set the
common FSB frequency at the lowest setting if both processor slots are occupied or the
FSB setting of the occupied processor slot if only one processor is being used. A default
FSB frequency of 100 MHz is initially set upon power-up when V
Magnitude comparisons and frequency multiplexing to compute the common FSB
frequency occurs when the two 3-bit FSB GTL inputs from the chip sets are valid. The
common FSB frequency GTL outputs switch from the default frequency to the computed
frequency when the GTL reference voltage input (VREF) crosses a static 0.6 V internally
generated input comparator reference voltage. The GTL2009 then continually monitors
the FSB frequency and slot occupied inputs for any further changes.
The Nocona and Dempsey/Blackford Xeon processors specify a V
as well as a nominal V
changes that may extend V
GTL2009 allows a minimum V
DC or AC performance variation between these levels.
The GTL2009 is a companion chip to the GTL2006 platform health management
GTL-to-LVTTL translator and the newer GTL2007 that adds an enable function that
disables the error output to the monitoring agent for platforms that monitor the individual
error conditions from each processor.
GTL2009
3-bit GTL Front-Side Bus frequency comparator
Rev. 01 — 22 September 2005
Compares FSB frequency inputs to set the lowest frequency as the common bus
frequency.
Operates at a range of GTL signal levels
3.0 V to 3.6 V operation
LVTTL I/O are not 5 V tolerant
Companion chip to GTL2006 and GTL2007
ESD protection exceeds 2000 V HBM per JESD22-A114, 200 V MM per
JESD22-A115 and 1000 V CDM per JESD22-C101
Latch-up testing is done to JEDEC Standard JESD78, which exceeds 500 mA
Available in TSSOP16 package
ref
of 0.76 V and 0.73 V respectively. To allow for future voltage level
ref
to 0.63 of V
ref
of 0.66 V. Characterization results show that there is little
TT
(minimum of 0.693 V with V
Product data sheet
DD
TT
is greater than 1.5 V.
of 1.2 V and 1.1 V,
TT
of 1.1 V) the

Related parts for GTL2009PW

GTL2009PW Summary of contents

Page 1

GTL2009 3-bit GTL Front-Side Bus frequency comparator Rev. 01 — 22 September 2005 1. General description The GTL2009 is designed for the Nocona and Dempsey/Blackford dual Intel Xeon processor platforms to compare the Front-Side Bus (FSB) frequency settings and set ...

Page 2

... Philips Semiconductors 3. Quick reference data Table amb Symbol t PLH t PHL 4. Ordering information Table 2: Type number Topside GTL2009PW 5. Functional diagram VREF 1BI1 1BI2 1BI3 1AI 2AI 2BI1 2BI2 2BI3 Fig 1. Functional diagram of GTL2009 9397 750 13556 Product data sheet 3-bit GTL Front-Side Bus frequency comparator ...

Page 3

... AO1 V SS 2BI3 2BI2 2BI1 2AI 1AI 1BI3 1BI2 1BI1 9397 750 13556 Product data sheet 3-bit GTL Front-Side Bus frequency comparator VREF 2 BO3 3 4 BO2 GTL2009PW 5 BO1 AO2 6 AO1 Pin description Pin Type 1 supply 2 V ref 3 GTL output 4 GTL output 5 ...

Page 4

Philips Semiconductors 7. Functional description Refer to 7.1 Function tables Table 4: BSEL3 Table 5: Default on start-up is 101 Processor A FSB < B not occupied A A ...

Page 5

Philips Semiconductors 7.2 Default conditions input The FSB GTL output data is masked and a specific default value (100 MHz) is inserted upon power-up when V and valid data is supplied when the VREF input crosses a static 0.6 V ...

Page 6

Philips Semiconductors 8. Application design-in information common front-side bus Fig 3. Application diagram 8.1 Frequently asked questions Question 1: When the GTL2009 is unpowered, the LVTTL inputs may be pulled up to 3.3 V and we want to make sure ...

Page 7

Philips Semiconductors 9. Limiting values Table 9: Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to V (ground = 0 V). SS Symbol Parameter V supply voltage DD I input clamping current IK ...

Page 8

Philips Semiconductors 11. Static characteristics Table 11: Static characteristics Over recommended operating conditions. Voltages are referenced to V Symbol Parameter V HIGH-level output voltage; A port OH V LOW-level output voltage; A port OL LOW-level output voltage; B port I ...

Page 9

Philips Semiconductors 12. Dynamic characteristics Table 12: Dynamic characteristics V = 3 Symbol Parameter t LOW-to-HIGH propagation delay PLH t HIGH-to-LOW propagation delay PHL t LOW-to-HIGH propagation delay ...

Page 10

Philips Semiconductors 12.1 AC waveforms 1.5 V for A port and V M ref for A port and ...

Page 11

Philips Semiconductors 13. Test information Fig 10. Load circuitry for A outputs Fig 11. Load circuit for B outputs Definitions: R — load resistor L C — load capacitance includes jig and probe capacitance — termination resistance should ...

Page 12

Philips Semiconductors 14. Package outline TSSOP16: plastic thin shrink small outline package; 16 leads; body width 4 pin 1 index 1 DIMENSIONS (mm are the original dimensions) A UNIT max. ...

Page 13

Philips Semiconductors 15. Soldering 15.1 Introduction to soldering surface mount packages This text gives a very brief insight to a complex technology. A more in-depth account of soldering ICs can be found in our Data Handbook IC26; Integrated Circuit Packages ...

Page 14

Philips Semiconductors – smaller than 1.27 mm, the footprint longitudinal axis must be parallel to the transport direction of the printed-circuit board. The footprint must incorporate solder thieves at the downstream end. • For packages with leads on four sides, ...

Page 15

Philips Semiconductors [4] These packages are not suitable for wave soldering. On versions with the heatsink on the bottom side, the solder cannot penetrate between the printed-circuit board and the heatsink. On versions with the heatsink on the top side, ...

Page 16

Philips Semiconductors 18. Data sheet status [1] Level Data sheet status Product status I Objective data Development II Preliminary data Qualification III Product data Production [1] Please consult the most recently issued data sheet before initiating or completing a design. ...

Page 17

Philips Semiconductors 23. Contents 1 General description . . . . . . . . . . . . . . . . . . . . . . 1 2 Features . . . . . . . . ...

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