78Q8430-100CGTR/F Maxim Integrated Products, 78Q8430-100CGTR/F Datasheet - Page 76
78Q8430-100CGTR/F
Manufacturer Part Number
78Q8430-100CGTR/F
Description
Telecom ICs 10/100MAC+PHY MULTI MEDIA OFFLOAD CNTRLR
Manufacturer
Maxim Integrated Products
Datasheet
1.78Q8430-ARM9-EVM.pdf
(88 pages)
- Current page: 76 of 88
- Download datasheet (2Mb)
78Q8430 Data Sheet
7.7.3
MR1 bits 15 through 11 reflect the ability of the 78Q8430 PHY. They do not reflect any ability changes
made via the MII Management interface to MR0 bits 13 (SPEEDSL), 12 (ANEGEN) and 8 (DUPLEX).
76
Bits
15
14
13
12
11
10
9
8
7
6
5
4
3
2
PHY Status Register – MR1
Symbol
100T4
100X_F
100X_H
10T_F
10T_H
100T2_F
100T2_H
EXTS
RSVD
MFPS
ANEGC
RFAULT
ANEGA
LINK
RC/LH
RC/LL
Type
R
R
R
R
R
R
R
R
R
R
R
R
Default Description
(1)
0
1
1
1
1
0
0
0
0
0
0
0
0
100BASE-T4 Ability
Reads 0 to indicate the 78Q8430 PHY does not support
100BASE-T4 mode.
100BASE-TX Full Duplex Ability
100BASE-TX Half Duplex Ability
10BASE-T Full Duplex Ability
10BASE-T Half Duplex Ability
100BASE-T2 Full Duplex Ability
Reads 0 to indicate the 78Q8430 PHY does not support
100BASE-T2 full duplex mode.
100BASE-T2 Half Duplex Ability
Reads 0 to indicate the 78Q8430 PHY does not support
100BASE-T2 half duplex mode.
Extended Status Information Availability
Reads 0 to indicate the 78Q8430 PHY does not support
Extended Status information in MR15.
Reserved
Management Frame Preamble Suppression Support
A 0 indicates that the 78Q8430 PHY can read management
frames with a preamble.
Auto-negotiation Complete
Logic one indicates that the auto-negotiation process has
been completed and that the contents of registers MR4, 5, 6
are valid.
Remote Fault
A logic one indicates that a remote fault condition has been
detected and when so, it remains set until it is cleared. This
bit can only be cleared by reading this register (MR1) via the
management interface.
Auto-negotiation Ability
When set, this bit indicates the device’s ability to perform
Auto-Negotiation. The value of this bit is determined by the
ANEGEN bit (MR0.12).
Link Status
A logic one indicates that a valid link has been established. If
the link status should transition from an OK status to a NOT-
OK status, this bit will become cleared and remains cleared
until it is read.
0 = Not able
1 = Able (default)
0 = Not able
1 = Able (default)
0 = Not able
1 = Able (default)
0 = Not able
1 = Able (default)
DS_8430_001
Rev. 1.2
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