FDS4885C Fairchild Semiconductor, FDS4885C Datasheet - Page 3
![MOSFET N/P-CH DUAL 40V 8SOIC](/photos/5/42/54236/261-8-soic_sml.jpg)
FDS4885C
Manufacturer Part Number
FDS4885C
Description
MOSFET N/P-CH DUAL 40V 8SOIC
Manufacturer
Fairchild Semiconductor
Series
PowerTrench®r
Datasheet
1.FDS4885C.pdf
(8 pages)
Specifications of FDS4885C
Fet Type
N and P-Channel
Fet Feature
Standard
Rds On (max) @ Id, Vgs
22 mOhm @ 7.5A, 10V
Drain To Source Voltage (vdss)
40V
Current - Continuous Drain (id) @ 25° C
7.5A, 6A
Vgs(th) (max) @ Id
5V @ 250µA
Gate Charge (qg) @ Vgs
21nC @ 10V
Input Capacitance (ciss) @ Vds
900pF @ 20V
Power - Max
900mW
Mounting Type
Surface Mount
Package / Case
8-SOIC (3.9mm Width)
Configuration
Dual Dual Drain
Transistor Polarity
N and P-Channel
Resistance Drain-source Rds (on)
0.017 Ohms
Forward Transconductance Gfs (max / Min)
14 S, 19 S
Drain-source Breakdown Voltage
+/- 40 V
Gate-source Breakdown Voltage
+/- 20 V
Continuous Drain Current
7.5 A, - 6 A
Power Dissipation
2 W
Maximum Operating Temperature
+ 150 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 55 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
FDS4885C
Manufacturer:
Fairchild Semiconductor
Quantity:
135
Company:
Part Number:
FDS4885C-NL
Manufacturer:
FAIRCHILD
Quantity:
12 500
Notes:
1. R
Scale 1 : 1 on letter size paper
2. Pulse Test: Pulse Width < 300 s, Duty Cycle < 2.0%
Switching Characteristics
t
t
t
t
Q
Q
Q
I
V
t
Q
Symbol
Electrical Characteristics
Drain–Source Diode Characteristics and Maximum Ratings
the drain pins. R
f
d(on)
r
d(off)
S
rr
SD
g
gs
gd
rr
JA
is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of
Turn-On Delay Time
Turn-On Rise Time
Turn-Off Delay Time
Turn-Off Fall Time
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
Maximum Continuous Drain-Source Diode Forward Current
Drain-Source Diode Forward
Voltage
Diode Reverse Recovery
Time
Diode Reverse Recovery
Charge
JC
is guaranteed by design while R
a) 78°/W when
Parameter
mounted on a
0.5 in
copper
2
pad of 2 oz
(Note 2)
CA
Q1
V
V
Q2
V
V
Q1
V
Q2
V
V
V
Q1
I
Q2
I
is determined by the user's board design.
F
F
(continued)
DD
GS
DD
GS
DS
DS
GS
GS
= 7.5 A, d
= –6 A, d
= 20 V, I
= –20 V, I
= 20 V, I
= 10V,
= –20 V, I
= –10V, R
= 0 V, I
= 0 V, I
Test Conditions
b) 125°/W when
iF
S
S
/d
iF
D
mounted on a .02 in
pad of 2 oz copper
= 1.3 A
= –1.3 A
R
/d
D
D
D
= 7.5 A, V
t
GEN
GEN
= 100 A/µs
= –6 A,V
t
= 1 A,
= –1 A,
= 100 A/µs
= 6
= 6
T
A
= 25°C unless otherwise noted
GS
GS
= 10 V
= –10 V
2
(Note 2)
(Note 2)
Type Min
Q1
Q2
Q1
Q2
Q1
Q2
Q1
Q2
Q1
Q2
Q1
Q2
Q1
Q2
Q1
Q2
Q1
Q2
Q1
Q2
Q1
Q2
c) 135°/W when mounted on a
minimum pad.
Typ Max Units
–0.7
4.6
0.7
26
11
36
14
45
71
33
30
15
29
26
26
18
13
5
4
5
–1.3
–1.2
114
1.3
1.2
42
20
58
25
72
53
48
21
41
FDS4885C Rev D(W)
nC
nC
nC
nS
nC
ns
ns
ns
ns
A
V