ADUC7121BBCZ-RL Analog Devices Inc, ADUC7121BBCZ-RL Datasheet - Page 17

• Manufacturer Part Number: ADUC7121BBCZ-RL
• Description: PRECISION ANALOG MCU I.C
• Manufacturer: Analog Devices Inc
• Series: MicroConverter® ADuC7xxxr

Specifications of ADUC7121BBCZ-RL

• Core Processor: ARM7
• Core Size: 16/32-Bit
• Speed: 41.78MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 32
• Program Memory Size: 126KB (63K x 16)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 9x12b, D/A 4x12b
• Oscillator Type: Internal
• Operating Temperature: -10°C ~ 95°C
• Package / Case: 108-LFBGA, CSPBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: ADUC7121BBCZ-RL; ADUC7121BBCZ-RLTR

Pin No.
C2
D2
C10
D10
H3
J3
B3
B2
F11
G11
H11
J11
H10
J10
C1
C9
C4
C11
Mnemonic
P1.0/SIN/SCL1/PLAI[7]
P1.1/SOUT/SDA1/PLAI[6]
P1.2/TDI/PLAO[15]
P1.3/TDO/PLAO[14]
P1.4/PWM1/ECLK/XCLK/PLAI[8]
P1.5/PWM2/PLAI[9]
P1.6/PLAO[5]
P1.7/PLAO[4]
P2.0/IRQ0/PLAI[13]
P2.1/IRQ1/PLAI[12]
P2.2/PLAI[1]
P2.3/IRQ2/PLAI[14]
P2.4/PWM5/PLAO[7]
P2.5/PWM6/PLAO[6]
P2.6/IRQ3/PLAI[15]
P2.7/PLAI[0]
P3.0/PLAO[0]
P3.1/PLAO[1]
Type
I/O
I/O
DI
DO
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
1
Description
General-Purpose Input and Output Port 1.0 (P1.0).
Serial Input, Receive Data, UART (SIN).
I
Programmable Logic Array for Input Element 7 (PLAI[7]).
General-Purpose Input and Output Port 1.1 (P1.1).
Serial Output, Transmit Data, UART (SOUT).
I
Programmable Logic Array for Input Element 6 (PLAI[6]).
General-Purpose Input and Output Port 1.2 (P1.2).
JTAG Test Port Input, Test Data In (TDI). The TDI function of Pin C10 is for debug and
download access.
Programmable Logic Array for Output Element 15 (PLAO[15]).
General-Purpose Input and Output Port 1.3 (P1.3).
JTAG Test Port Output, Test Data Out (TDO). The TDO function of Pin D10 is for debug
and download access.
Programmable Logic Array for Output Element 14 (PLAO[14]).
General-Purpose Input and Output Port 1.4 (P1.4).
Pulse-Width Modulator 1 Output (PWM1).
Base System Clock Output (ECLK).
Base System Clock Input (XCLK).
Programmable Logic Array for Input Element 8 (PLAI[8]).
General-Purpose Input and Output Port 1.5 (P1.5).
Pulse-Width Modulator 2 Output (PWM2).
Programmable Logic Array for Input Element 9 (PLAI[9]).
General-Purpose Input and Output Port 1.6 (P1.6).
Programmable Logic Array for Output Element 5 (PLAO[5]).
General-Purpose Input and Output Port 1.7 (P1.7).
Programmable Logic Array for Output Element 4 (PLAO[4]).
General-Purpose Input and Output Port 2.0 (P2.0)/External Interrupt Request 0,
Active High.
Programmable Logic Array for Input Element 13 (PLAI[13]).
General-Purpose Input and Output Port 2.1 (P2.1)
External Interrupt Request 1, Active High (IRQ1).
Programmable Logic Array for Input Element 12 (PLAI[12]).
General-Purpose Input and Output Port 2.2 (P2.2).
Programmable Logic Array for Input Element 1 (PLAI[1]).
General-Purpose Input and Output Port 2.3 (P2.3).
External Interrupt Request 2, Active High (IRQ2).
Programmable Logic Array for Input Element 14 (PLAI[14]).
General-Purpose Input and Output Port 2.4 (P2.4).
Pulse-Width Modulator 5 Output (PWM5).
Programmable Logic Array for Output Element 7 (PLAO[7]).
General-Purpose Input and Output Port 2.5 (P2.5).
Pulse-Width Modulator 6 Output (PWM6).
Programmable Logic Array for Output Element 6 (PLAO[6]).
General-Purpose Input and Output Port 2.6 (P2.6).
External Interrupt Request 3, Active High (IRQ3).
Programmable Logic Array for Input Element 15 (PLAI[15]).
General-Purpose Input and Output Port 2.7 (P2.7).
General-Purpose Input and Output Port 3.0 (P3.0).
Programmable Logic Array for Output Element 0 (PLAO[0]).
General-Purpose Input and Output Port 3.1 (P3.1).
Programmable Logic Array for Output Element 1 (PLAO[1]).
2
2
C Interface Serial Clock for I
C Interface Serial Data for I
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2
2
C1 (SDA1).
C1 (SCL1).
ADuC7121