ADUC7039BCP6Z-RL Analog Devices Inc, ADUC7039BCP6Z-RL Datasheet - Page 77

• Manufacturer Part Number: ADUC7039BCP6Z-RL
• Description: Flash 64k ARM7 Dual 16-Bit ADC LIN I.C.
• Manufacturer: Analog Devices Inc
• Series: MicroConverter® ADuC7xxxr

Specifications of ADUC7039BCP6Z-RL

• Core Processor: ARM7
• Core Size: 16/32-Bit
• Speed: 20.48MHz
• Connectivity: LIN, SPI
• Peripherals: POR, Temp Sensor, WDT
• Number Of I /o: 6
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 3.5 V ~ 18 V
• Data Converters: A/D 2x16b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 115°C
• Package / Case: 32-LFCSP
• Lead Free Status / RoHS Status: Lead free by exemption / RoHS compliant by exemption
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free by exemption / RoHS compliant by exemption

HIGH VOLTAGE PERIPHERAL CONTROL INTERFACE
The ADuC7039 integrates a number of high voltage circuit
functions that are controlled and monitored through a regis-
tered interface consisting of two MMRs, namely, HVCON
and HVDAT. The HVCON register acts as a command byte
interpreter allowing the microcontroller to indirectly read or
write 8-bit data (the value in HVDAT) from or to one of two
high voltage status/configuration registers. These high voltage
registers are not MMRs but registers commonly referred to as
indirect registers; that is, they can only be accessed indirectly
via the HVCON and HVDAT MMRs.
The physical interface between the HVCON register and the
indirect high voltage registers is a 2-wire (data and clock) serial
interface based on a 2.56 MHz serial clock. Therefore, there is a
finite, 10 μs (maximum) latency between the MCU core writing
a command into HVCON and that command or data reaching
the indirect high voltage registers. There is also a finite 10 μs
latency between the MCU core writing a command into
HVCON and indirect register data being read back into the
HVDAT register. A busy bit (Bit 0 of the HVCON when read by
MCU) can be polled by the MCU to confirm when a read/write
command is complete.
Figure 29 describes the top-level architecture of the high
voltage interface and related circuits. The LIN physical
interface is controlled and monitored via this interface.
PERIPHERALS
ARM7
MCU
AND
Figure 29. High Voltage Interface, Top-Level Block Diagram
IRQ
HIGH VOLTAGE
INTERFACE
HVCON
HVDAT
MMRs
Rev. B | Page 77 of 92
SERIAL
SERIAL
CLOCK
DATA
HIGH VOLTAGE
The high voltage interface consists of two MMRs and two
indirect registers:
•
•
•
•
CONTROLLER
CONTROLLER
INTERFACE
INTERRUPT
SERIAL
HVCON is an 8-bit register acting as a command byte
interpreter for the high voltage control interface. Bytes
written to this register are interpreted as read or write
commands to a set of two indirect registers related to the
high voltage circuits. These commands are described in
Table 56. The success of that operation can be monitored
by reading back the HVCON MMR.
HVDAT is a 12-bit register that is used to hold data to
be written indirectly to and read indirectly from the high
voltage interface registers.
HVCFG is an 8-bit register controlling the function of high
voltage circuits, accessed using HVCON and HVDAT.
HVSTA is an 8-bit read-only register reflecting the state of
the high voltage circuits. This register is not an MMR and
does not appear in the MMR memory map. It is accessed
through the HVCON registered interface, and data is read
back from this register via HVDAT. In response to a high
voltage interrupt event, the high voltage interrupt control-
ler simultaneously and automatically loads the current
value of the high voltage status register (HVSTA) into
the HVDAT register.
HVCFG[2:0]
HVCFG[4]
LIN S/C—HVSTA[0]
HIGH VOLTAGE
REGISTERS
(INDIRECT)
HVCFG
HVSTA
LVF
LIN
ADuC7039