ADSP-21065LKCAZ264 Analog Devices Inc, ADSP-21065LKCAZ264 Datasheet - Page 12
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ADSP-21065LKCAZ264
Manufacturer Part Number
ADSP-21065LKCAZ264
Description
ADSP-21065L 66MHZ MINI BGA
Manufacturer
Analog Devices Inc
Series
SHARC®r
Type
Fixed/Floating Pointr
Datasheet
1.ADSP-21065LKSZ-240.pdf
(44 pages)
Specifications of ADSP-21065LKCAZ264
Interface
Host Interface, Serial Port
Clock Rate
60MHz
Non-volatile Memory
External
On-chip Ram
64kB
Voltage - I/o
3.30V
Voltage - Core
3.30V
Operating Temperature
0°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
196-CSPBGA
Device Core Size
32b
Architecture
Enhanced Harvard
Format
Floating Point
Clock Freq (max)
66MHz
Mips
66
Device Input Clock Speed
66MHz
Ram Size
68KB
Program Memory Size
Not RequiredKB
Operating Supply Voltage (typ)
3.3V
Operating Supply Voltage (min)
3.13V
Operating Supply Voltage (max)
3.6V
Operating Temp Range
0C to 85C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
196
Package Type
CSPBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ADSP-21065LKCAZ264
Manufacturer:
Analog Devices Inc
Quantity:
10 000
ABSOLUTE MAXIMUM RATINGS*
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to +4.6 V
Input Voltage . . . . . . . . . . . . . . . . . . . . . –0.5 V to V
Output Voltage Swing . . . . . . . . . . . . . . –0.5 V to V
Load Capacitance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 200 pF
Junction Temperature Under Bias . . . . . . . . . . . . . . . . . 130∞C
ADSP-21065L–SPECIFICATIONS
RECOMMENDED OPERATING CONDITIONS
Parameter
V
T
V
V
V
NOTE
See Environmental Conditions for information on thermal specifications.
ELECTRICAL CHARACTERISTICS
Parameter
V
V
I
I
I
I
I
I
I
I
I
C
NOTES
10
11
12
13
Specifications subject to change without notice.
ESD SENSITIVITY
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection. Although
the ADSP-21065L features proprietary ESD protection circuitry, permanent damage may occur on
devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are
recommended to avoid performance degradation or loss of functionality.
1
2
3
4
5
6
7
8
9
IH
IL
ILP
OZH
OZL
OZLS
OZLA
OZLAR
OZLC
Applies to input pins with internal pull-ups: DR0A, DR1A, DR0B, DR1B, TRST, TMS, TDI.
Applies to three-statable pins: DATA
Applies to CPA pin.
Applies to ACK pin when pulled up.
DD
IH
IL1
IL2
OH
OL
Applies to input and bidirectional pins: DATA
RPBA, CPA, TFS0, TFS1, RFS0, RFS1, BMS, TMS, TDI, TCK, HBR, DR0A, DR1A, DR0B, DR1B, TCLK0, TCLK1, RCLK0, RCLK1, RESET, TRST,
PWM_EVENT0, PWM_EVENT1, RAS, CAS, SDWE, SDCKE.
Applies to input pin CLKIN.
Applies to output and bidirectional pins: DATA
TCLK1, RCLK0, RCLK1, TFS0, TFS1, RFS0, RFS1, DT0A, DT1A, DT0B, DT1B, XTAL, BMS, TDO, EMU, BMSTR, PWM_EVENT0, PWM_EVENT1,
RAS, CAS, DQM, SDWE, SDCLK0, SDCLK1, SDCKE, SDA10.
See Output Drive Currents for typical drive current capabilities.
Applies to input pins: ACK, SBTS, IRQ
during reset in a multiprocessor system, when ID
SDWE, SDCLK0, SDCLK1, SDCKE, SDA10, and EMU (Note that ACK is pulled up internally with 2 kW during reset in a multiprocessor system, when ID
01 and another ADSP-21065L is not requesting bus mastership).
Applies to three-statable pins with internal pull-ups: DT0A, DT1A, DT0B, DT1B, TCLK0, TCLK1, RCLK0, RCLK1.
Applies to ACK pin when keeper latch enabled.
Guaranteed but not tested.
Applies to all signal pins.
CASE
IN
High Level Output Voltage
Low Level Output Voltage
High Level Input Current
Low Level Input Current
Low Level Input Current
Three-State Leakage Current
Three-State Leakage Current
Three-State Leakage Current
Three-State Leakage Current
Three-State Leakage Current
Three-State Leakage Current
Input Capacitance
Supply Voltage
Case Operating Temperature
High Level Input Voltage
Low Level Input Voltage
Low Level Input Voltage
12, 13
31-0
, ADDR
2-0
5
6
5
, HBR, CS, DMAR1, DMAR2, ID
3
3
7, 8, 9, 10
7
8
11
10
9
31-0
31-0
1
2
23-0
1-0
, ADDR
, ADDR
, MS
= 01 and another ADSP-21065L is not requesting bus mastership.)
3-0
23-0
, RD, WR, SW, ACK, FLAG
Test
Conditions
@ V
@ V
@ V
23-0
, BSEL, RD, WR, SW, ACK, SBTS, IRQ
, MS
Test Conditions
@ V
@ V
@ V
@ V
@ V
@ V
@ V
@ V
@ V
@ V
@ V
f
IN
DD
DD
DD
DD
DD
= 1 MHz, T
3-0
DD
DD
DD
DD
DD
DD
DD
DD
DD
DD
DD
+ 0.5 V
+ 0.5 V
= max
= min
= min
, RD, WR, SW, ACK, FLAG
= min, I
= min, I
= max, V
= max, V
= max, V
= max, V
= max, V
= max, V
= max, V
= max, V
= max, V
1-0
–12–
, BSEL, CLKIN, RESET, TCK (Note that ACK is pulled up internally with 2 kW
Storage Temperature Range . . . . . . . . . . . . . –65∞C to +150∞C
Lead Temperature (5 seconds) . . . . . . . . . . . . . . . . . . . 280∞C
*Stresses greater than those listed above may cause permanent damage to the device.
CASE
OH
OL
These are stress ratings only; functional operation of the device at these or any other
conditions greater than those indicated in the operational sections of this specifica-
tion is not implied. Exposure to absolute maximum rating conditions for extended
periods may affect device reliability.
IN
IN
IN
IN
IN
IN
IN
IN
IN
Min
3.13
–40
2.0
–0.5
–0.5
= 4.0 mA
= –2.0 mA
= V
= 0 V
= 0 V
= V
= 0 V
= 0 V
= 1.5 V
= 0 V
= 0 V
11-0
= 25∞C, V
, REDY, HBG, DMAG
C Grade
DD
DD
max
max
4
11-0
4
Max
3.60
+100
V
0.8
0.7
IN
, HBG, REDY, DMAG1, DMAG2, BR
2-0
DD
= 2.5 V
, FLAG
+ 0.5
11-0
1
, DMAG
, HBG, CS, DMAR1, DMAR2, BR
Min
3.13
0
2.0
–0.5
–0.5
Min
2.4
2
, BMS, TDO, RAS, CAS, DQM,
C and K Grades
WARNING!
K Grade
ESD SENSITIVE DEVICE
Max
3.60
+85
V
0.8
0.7
Max
0.4
10
10
150
10
8
150
350
4
1.5
8
DD
2-1
, CPA, TCLK0,
+ 0.5
2-1
, ID
REV. C
Unit
V
∞C
V
V
V
Unit
V
V
mA
mA
mA
mA
mA
mA
mA
mA
mA
pF
1-0
2-0
,
=