AD9861BCP-50 Analog Devices Inc, AD9861BCP-50 Datasheet - Page 29
![IC,RF Modulator/Demodulator,LLCC,64PIN,PLASTIC](/photos/6/50/65021/505-64-lfcsp_sml.jpg)
AD9861BCP-50
Manufacturer Part Number
AD9861BCP-50
Description
IC,RF Modulator/Demodulator,LLCC,64PIN,PLASTIC
Manufacturer
Analog Devices Inc
Datasheet
1.AD9861-50EB.pdf
(52 pages)
Specifications of AD9861BCP-50
Rohs Status
RoHS non-compliant
Rf Type
WLL, WLAN
Features
10-bit ADC(s), 10-bit DAC(s)
Package / Case
64-VFQFN, CSP Exposed Pad
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
AD9861BCP-50
Manufacturer:
AD
Quantity:
1 000
Part Number:
AD9861BCP-50
Manufacturer:
ADI/亚德诺
Quantity:
20 000
Figure 76 shows a timing diagram of the AuxSPI when it is used to control and access an AuxADC.
Figure 77 shows the timing for each of the three AuxADC modes of operation.
EXTERNAL START COVERT BIT AND
SPI READOUT MODE
READOUT MODE WITH AUXILIARY SPI
NORMAL SPI READOUT
Figure 77. AuxADC Data Cycle Times for Various Readout Methods
AUXSPI_SDO
AUXSPI_CLK
AUXSPI_CS
16 SPI CLKs USED TO CONFIGURE AND
INITIATE A START CONVERSION
EXTERNAL PIN USED TO INITIATE A
START CONVERSION
EXTERNAL PIN USED TO INITIATE A
START CONVERSION
Figure 76. Timing Diagram of AuxSPI
1. AUXADC CONVERSION START SIGNAL
2. AUXADC CONVERSION DONE
3. AUXADC OUTPUT UDATE (MSB)
1 2 3
16 SPI CLK
Rev. 0 | Page 29 of 52
NORMAL SPI READOUT
CYCLE TIME = 16 SPI CLK +
D
9
D
8
t
CONVERSION
READOUT MODE WITH
AUXILIARY SPI
CYCLE TIME =
EXTERNAL START COVERT BIT AND
SPI READOUT MODE
CYCLE TIME =
=
t
t
C
C
+ 16 SPI CLK
16 SPI CLKs USED TO READ BACK
8 REGISTER BITS
16 SPI CLKs USED TO READ BACK
8 REGISTER BITS
8-BIT SERIAL
OUTPUT
t
t
C
C
+ 8 SPI CLK
+ 16 SPI CLK
D
0
03606-0-021
16 SPI CLK
03606-0-007
AD9861