AD9410BSVZ Analog Devices Inc, AD9410BSVZ Datasheet - Page 4

• Manufacturer Part Number: AD9410BSVZ
• Description: 10 BIT 210 MSPS ADC
• Manufacturer: Analog Devices Inc

Specifications of AD9410BSVZ

• Number Of Bits: 10
• Sampling Rate (per Second): 210M
• Data Interface: Parallel
• Number Of Converters: 1
• Power Dissipation (max): 2.4W
• Voltage Supply Source: Analog and Digital
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 80-TQFP Exposed Pad, 80-eTQFP, 80-HTQFP, 80-VQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

AD9410
SWITCHING SPECIFICATIONS
V
Table 2.
Parameter
SWITCHING PERFORMANCE
1
DIGITAL SPECIFICATIONS
V
Table 3.
Parameter
DIGITAL INPUTS
DIGITAL OUTPUTS
1
2
C
I/P pin Logic 1 = 5 V, Logic 0 = GND. It is recommended to use a series 2.5 kΩ (±10%) resistor to V
See Clock Input section.
DD
DD
LOAD
Maximum Conversion Rate
Minimum Conversion Rate
Clock Pulse Width High, t
Clock Pulse Width Low, t
Aperture Delay, t
Aperture Uncertainty (Jitter)
Output Valid Time, t
Output Propagation Delay, t
Output Rise Time, t
Output Fall Time, t
CLKOUT Propagation Delay, t
Data to DCO Skew, (t
Interleaved Mode (A, B Latency)
Parallel Mode (A, B Latency)
DFS, Input Logic 1 Voltage
DFS, Input Logic 0 Voltage
DFS, Input Logic 1 Current
DFS, Input Logic 0 Current
I/P Input Logic 1 Current
I/P Input Logic 0 Current
CLK+, CLK− Differential Input Voltage
CLK+, CLK− Differential Input Resistance
CLK+, CLK− Common-Mode Input Voltage
DS, DS Differential Input Voltage
DS, DS Common-Mode Input Voltage
Digital Input Pin Capacitance
Logic 1 Voltage (V
Logic 0 Voltage (V
Output Coding
= 3.3 V, V
= 3.3 V, V
DS Setup Time, t
DS Hold Time, t
= 5 pF.
D
D
= 3.3 V, V
= 3.3 V, V
A
HDS
DD
DD
F
SDS
R
V
= 3.3 V)
= 3.3 V)
PD
CC
– t
CC
EL
1
1
= 5.0 V; 2.5 V external reference; A
EH
CPD
= 5.0 V; 2.5 V external reference; A
PD
)
CPD
1
2
Temp
25°C
25°C
25°C
25°C
Full
Full
25°C
25°C
Full
Full
Full
Full
Full
Full
Full
Full
Temp
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
25°C
Full
Full
IN
Rev. A | Page 4 of 20
= −0.5 dBFS; clock input = 210 MSPS; T
IN
= −0.5 dBFS; clock input = 210 MSPS; T
Test Level
IV
IV
V
V
V
V
IV
V
V
IV
V
V
VI
VI
Test Level
IV
IV
V
V
VI
VI
V
V
VI
IV
IV
IV
VI
VI
VI
IV
Min
4
0.4
V
0.4
DD
DD
when setting to Logic 1 to limit input current.
– 0.05
Min
210
1.2
1.2
3.0
2.6
0
0.5
0
Binary or Twos Complement
Typ
50
50
400
1
1.6
1.5
1.5
3
Typ
2.4
2.4
1.0
0.65
1.8
1.4
4.8
1
A = 6, B = 6
A = 7, B = 6
A
Max
1
0.05
= 25°C; unless otherwise noted.
A
= 25°C; unless otherwise noted.
Max
100
7.4
6.4
2
Unit
MSPS
MSPS
ns
ns
ns
ps rms
ns
ns
ns
ns
ns
ns
ns
ns
Cycles
Cycles
Unit
V
V
μA
μA
μA
μA
V
kΩ
V
V
V
pF
V
V