5M160ZE64C5N Altera, 5M160ZE64C5N Datasheet - Page 12
5M160ZE64C5N
Manufacturer Part Number
5M160ZE64C5N
Description
ALTERA
Manufacturer
Altera
Series
MAX Vr
Datasheets
1.DK-DEV-5M570ZN.pdf
(30 pages)
2.DK-DEV-5M570ZN.pdf
(164 pages)
3.DK-DSP-3SL150N.pdf
(80 pages)
Specifications of 5M160ZE64C5N
Cpld Type
FLASH
No. Of Macrocells
128
No. Of I/o's
79
Propagation Delay
7.5ns
Global Clock Setup Time
4.6ns
Frequency
118.3MHz
Supply Voltage Range
1.71V To 1.89V
Programmable Type
In System Programmable
Delay Time Tpd(1) Max
7.5ns
Voltage Supply - Internal
1.71 V ~ 1.89 V
Number Of Logic Elements/blocks
160
Number Of Macrocells
128
Number Of Gates
-
Number Of I /o
54
Operating Temperature
0°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
64-TQFP Exposed Pad
Rohs Compliant
Yes
Lead Free Status / Rohs Status
Vendor undefined / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
5M160ZE64C5N
Manufacturer:
MAXIM
Quantity:
11 540
Company:
Part Number:
5M160ZE64C5N
Manufacturer:
ALTERA
Quantity:
100
Part Number:
5M160ZE64C5N
Manufacturer:
ALTERA/阿尔特拉
Quantity:
20 000
3–12
Table 3–18. LE Internal Timing Microparameters for MAX V Devices
Table 3–19. IOE Internal Timing Microparameters for MAX V Devices (Part 1 of 2)
MAX V Device Handbook
t
t
t
t
t
t
t
t
t
t
t
t
t
t
LUT
COMB
CLR
PRE
SU
H
CO
CLKHL
C
FASTIO
IN
GLOB
IOE
DL
Symbol
Symbol
(1)
Internal Timing Parameters
LE combinational look-up
table (LUT) delay
Combinational path delay
LE register clear delay
LE register preset delay
LE register setup time
before clock
LE register hold time
after clock
LE register
clock-to-output delay
Minimum clock high or
low time
Register control delay
Data output delay from
adjacent LE to I/O block
I/O input pad and buffer
delay
I/O input pad and buffer
delay used as global
signal pin
Internally generated
output enable delay
Input routing delay
f
Parameter
Parameter
Internal timing parameters are specified on a speed grade basis independent of device
density.
timing microparameters for LEs, input/output elements (IOEs), UFM blocks, and
MultiTrack interconnects.
For more information about each internal timing microparameters symbol, refer to
AN629: Understanding Timing in Altera
Table 3–18
Min
Min
401
401
260
253
—
—
—
—
—
—
—
—
—
0
through
5M40Z/ 5M80Z/ 5M160Z/
5M40Z/ 5M80Z/ 5M160Z/
C4
C4
5M240Z/ 5M570Z
5M240Z/ 5M570Z
1,215
1,356
2,261
Max
Max
243
380
170
907
530
318
—
—
—
—
—
Table 3–25 on page 3–18
Min
545
545
321
339
Min
—
—
—
—
—
—
—
—
—
0
C5, I5
C5, I5
Chapter 3: DC and Switching Characteristics for MAX V Devices
CPLDs.
2,247
1,741
3,322
1,410
Max
Max
309
494
428
986
509
—
—
—
—
—
Min
309
309
271
216
Min
—
—
—
—
—
—
—
—
—
0
list the MAX V device internal
C4
C4
5M1270Z/ 5M2210Z
5M1270Z/ 5M2210Z
1,114
1,974
Max
Max
742
192
305
207
920
374
291
—
—
—
—
—
January 2011 Altera Corporation
Timing Model and Specifications
Min
381
381
333
266
Min
—
—
—
—
—
—
—
—
—
0
C5, I5
C5, I5
1,372
1,132
2,430
Max
Max
914
236
376
254
460
358
—
—
—
—
—
Unit
Unit
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps