NTHS0603N01N6802JE Vishay, NTHS0603N01N6802JE Datasheet - Page 56
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NTHS0603N01N6802JE
Manufacturer Part Number
NTHS0603N01N6802JE
Description
THERMISTOR NTC 68K OHM 5% 0603
Manufacturer
Vishay
Series
NTHSr
Type
NTCr
Datasheets
1.S29GL032N90TFI010.pdf
(81 pages)
2.NTHS0603N02N1002KE.pdf
(3 pages)
3.NTHS0603N01N6802JE.pdf
(3 pages)
Specifications of NTHS0603N01N6802JE
Resistance In Ohms @ 25°c
68K
Resistance Tolerance
±5%
B Value Tolerance
±3%
B25/75
3964K
Mounting Type
Surface Mount
Package / Case
0603 (1608 Metric)
Description Of Terminals
Leadless
Mounting Style
Surface Mount
Pin Count
2
Screening Level
Automotive
Sensitivity Index
3964K
Resistance @ 25c
68kohm
Percentage Of Resistance Tolerance @ 25c
±5
Accuracy
±3
Operating Temperature Min Deg. C
-40C
Operating Temperature Max Deg. C
125C
Product Length (mm)
1.6mm
Product Depth (mm)
0.8mm
Lead Free Status / RoHS Status
Lead free by exemption / RoHS Compliant
B0/50
-
B25/50
-
B25/85
-
B25/100
-
Operating Temperature
-
Power - Max
-
Lead Length
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
541-1104-2
NTHS0603N01N6802JE
NTHS0603N01N6802JE
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
NTHS0603N01N6802JE
Manufacturer:
VISHAY/威世
Quantity:
20 000
10.12 RY/BY#: Ready/Busy#
56
Notes
1. VA = Valid address for programming. During a sector erase operation, a valid address is any sector address within the sector being
2. DQ7 should be rechecked even if DQ5 = 1 because DQ7 may change simultaneously with DQ5.
The RY/BY# is a dedicated, open-drain output pin which indicates whether an Embedded Algorithm is in
progress or complete. The RY/BY# status is valid after the rising edge of the final WE# pulse in the command
sequence. Since RY/BY# is an open-drain output, several RY/BY# pins can be tied together in parallel with a
pull-up resistor to V
If the output is low (Busy), the device is actively erasing or programming. (This includes programming in the
Erase Suspend mode.) If the output is high (Ready), the device is in the read mode, the standby mode, or in
the erase-suspend-read mode.
erased. During chip erase, a valid address is any non-protected sector address.
CC
.
S29GL-N MirrorBit
No
Table 10.5 on page 60
Figure 10.5 Data# Polling Algorithm
Read DQ15–DQ0
Read DQ15–DQ0
DQ7 = Data?
DQ7 = Data?
Addr = VA
Addr = VA
DQ5 = 1?
START
FAIL
D a t a
®
No
Yes
No
Flash Family
shows the outputs for RY/BY#.
S h e e t
Yes
Yes
PASS
S29GL-N_01_12 October 29, 2008