PIC18F4423-E/ML Microchip Technology, PIC18F4423-E/ML Datasheet - Page 31
![16KB, Flash, 768bytes-RAM, 36I/O, 8-bit Family,nanoWatt 44 QFN 8x8x0.9mm TUBE](/photos/6/81/68122/150-44-qfn_sml.jpg)
PIC18F4423-E/ML
Manufacturer Part Number
PIC18F4423-E/ML
Description
16KB, Flash, 768bytes-RAM, 36I/O, 8-bit Family,nanoWatt 44 QFN 8x8x0.9mm TUBE
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheets
1.PIC18F2221-ISO.pdf
(46 pages)
2.PIC18F2423-ISP.pdf
(54 pages)
3.PIC18F2423-ISP.pdf
(8 pages)
4.PIC18F2423-ISP.pdf
(34 pages)
Specifications of PIC18F4423-E/ML
Core Processor
PIC
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, HLVD, POR, PWM, WDT
Number Of I /o
36
Program Memory Size
16KB (8K x 16)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 13x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
44-QFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
6.0
© 2005 Microchip Technology Inc.
Standard Operating Conditions
Operating Temperature: 25°C is recommended
Param
P11A
P12
P13
P14
P15
P16
P17
P18
Note 1:
No.
2:
3:
T
T
T
T
T
T
T
T
AC/DC CHARACTERISTICS TIMING REQUIREMENTS
FOR PROGRAM/VERIFY TEST MODE (CONTINUED)
Sym
DRWT
HLD
SET
VALID
SET
DLY
HLD
HLD
Do not allow excess time when transitioning MCLR between V
executions to occur. The maximum transition time is:
where T
specific values, refer to the Electrical Characteristics section of the device data sheet for the particular device.
When ICPORT = 1, this specification also applies to ICV
At 0°C-50°C.
2 V
3 PGM ↑ Setup Time to MCLR/V
8 Delay between Last PGC ↓ and MCLR/V
2 Input Data Hold Time from MCLR/V
3 MCLR/V
4 MCLR/V
1 T
2 ms (for HS/PLL mode only) + 1.5 μs (for EC mode only)
Data Write Polling Time
Data Out Valid from PGC ↑
CY
DD
CY
+ T
↑ Setup Time to MCLR/V
is the instruction cycle time, T
PWRT
PP
PP
/RE3 ↓ to V
/RE3 ↓ to PGM ↓
(if enabled) + 1024 T
Characteristic
DD
↓
PP
PP
PIC18F2423/2523/4423/4523
/RE3 ↑
/RE3 ↑
OSC
PP
PWRT
/RE3 ↑
(for LP, HS, HS/PLL and XT modes only) +
PP
is the Power-up Timer period and T
/RE3 ↓
PP
.
Min
100
10
—
4
2
2
0
0
IL
and V
Max
IHH
100
—
—
—
—
—
—
—
; this can cause spurious program
Units
ms
μs
ns
ns
μs
ns
OSC
s
s
is the oscillator period. For
(Note 2)
(Note 2)
Conditions
DS39759A-page 31