PIC18F2410-E/ML Microchip Technology, PIC18F2410-E/ML Datasheet - Page 126
PIC18F2410-E/ML
Manufacturer Part Number
PIC18F2410-E/ML
Description
IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,LLCC,28PIN,PLASTIC
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheets
1.PIC18LF2410-ISO.pdf
(376 pages)
2.PIC18LF2410-ISO.pdf
(8 pages)
3.PIC18LF2410-ISO.pdf
(16 pages)
4.PIC18LF2410-ISO.pdf
(6 pages)
5.PIC18LF2410-ISO.pdf
(6 pages)
6.PIC18LF2410-ISO.pdf
(8 pages)
Specifications of PIC18F2410-E/ML
Rohs Compliant
YES
Core Processor
PIC
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, HLVD, POR, PWM, WDT
Number Of I /o
25
Program Memory Size
16KB (8K x 16)
Program Memory Type
FLASH
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 10x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
28-VQFN Exposed Pad, 28-HVQFN, 28-SQFN, 28-DHVQFN
Core
PIC
Processor Series
PIC18F
Data Bus Width
8 bit
Maximum Clock Frequency
40 MHz
Data Ram Size
768 B
On-chip Adc
10 bit
Number Of Programmable I/os
25
Number Of Timers
1 x 8
Operating Supply Voltage
4.2 V to 5.5 V
Mounting Style
SMD/SMT
Height
0.88 mm
Interface Type
EUSART, I2C, MSSP, SPI
Length
6 mm
Maximum Operating Temperature
+ 125 C
Minimum Operating Temperature
- 40 C
Supply Voltage (max)
5.5 V
Supply Voltage (min)
4.2 V
Width
6 mm
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
- PIC18LF2410-ISO PDF datasheet
- PIC18LF2410-ISO PDF datasheet #2
- PIC18LF2410-ISO PDF datasheet #3
- PIC18LF2410-ISO PDF datasheet #4
- PIC18LF2410-ISO PDF datasheet #5
- PIC18LF2410-ISO PDF datasheet #6
- Current page: 126 of 376
- Download datasheet (7Mb)
PIC18F2X1X/4X1X
13.1
Timer3 can operate in one of three modes:
• Timer
• Synchronous Counter
• Asynchronous Counter
FIGURE 13-1:
FIGURE 13-2:
DS39636D-page 128
Note 1: When enable bit, T1OSCEN, is cleared, the inverter and feedback resistor are turned off to eliminate power drain.
T1OSO/T13CKI
T13CKI/T1OSO
Note 1: When enable bit, T1OSCEN, is cleared, the inverter and feedback resistor are turned off to eliminate power drain.
Timer3 Operation
T1OSI
T1OSI
CCP1/CCP2 Select from T3CON<6,3>
CCP1/CCP2 Select from T3CON<6,3>
CCP1/CCP2 Special Event Trigger
CCP1/CCP2 Special Event Trigger
Timer1 Oscillator
T1OSCEN
T3CKPS1:T3CKPS0
T3SYNC
TMR3ON
TIMER3 BLOCK DIAGRAM
TIMER3 BLOCK DIAGRAM (16-BIT READ/WRITE MODE)
Timer1 Oscillator
T1OSCEN
T3CKPS1:T3CKPS0
T3SYNC
TMR3ON
(1)
(1)
TMR3CS
TMR3CS
Clock
Internal
F
Clock
Internal
F
OSC
OSC
/4
/4
1
0
1
0
Timer1 Clock Input
Timer1 Clock Input
Clear TMR3
Clear TMR3
Prescaler
1, 2, 4, 8
Prescaler
The operating mode is determined by the clock select
bit, TMR3CS (T3CON<1>). When TMR3CS is cleared
(= 0), Timer3 increments on every internal instruction
cycle (F
on every rising edge of the Timer1 external clock input
or the Timer1 oscillator, if enabled.
As with Timer1, the RC1/T1OSI and RC0/T1OSO/
T13CKI pins become inputs when the Timer1 oscillator
is enabled. This means the values of TRISC<1:0> are
ignored and the pins are read as ‘0’.
1, 2, 4, 8
2
2
OSC
TMR3L
TMR3L
/4). When the bit is set, Timer3 increments
8
Sleep Input
Synchronize
Sleep Input
8
Synchronize
Detect
Detect
High Byte
High Byte
TMR3H
TMR3
TMR3
8
© 2009 Microchip Technology Inc.
8
8
Internal Data Bus
1
0
1
0
Read TMR1L
Write TMR1L
on Overflow
on Overflow
TMR3IF
TMR3IF
Set
Set
Timer3
On/Off
Timer3
On/Off
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