PIC16F684-E/ML Microchip Technology, PIC16F684-E/ML Datasheet - Page 44

• Manufacturer Part Number: PIC16F684-E/ML
• Description: IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,LLCC,16PIN,PLASTIC
• Manufacturer: Microchip Technology
• Series: PIC® 16Fr

Specifications of PIC16F684-E/ML

• Rohs Compliant: YES
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 20MHz
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 12
• Program Memory Size: 3.5KB (2K x 14)
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 128 x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 16-QFN
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC164324 - MODULE SKT FOR MPLAB 8DFN/16QFNXLT16QFN1 - SOCKET TRANSITION 14DIP TO 16QFN
• Connectivity: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

PIC16F684
4.3.5
The RC4 is configurable to function as one of the
following:
• a general purpose I/O
• a digital output from the comparator
• a digital output from the Enhanced CCP
FIGURE 4-9:
TABLE 4-2:
DS41202F-page 42
Data Bus
ANSEL
CMCON0
PORTC
TRISC
Legend:
PORTC
PORTC
TRISC
TRISC
Note:
Name
WR
WR
RD
RD
Note
CCPOUT EN
CCPOUT EN
C2OUT EN
C2OUT EN
CCPOUT
C2OUT
1:
D
D
CK
CK
x = unknown, u = unchanged, – = unimplemented locations read as ‘0’. Shaded cells are not used by PORTC.
RC4/C2OUT/P1B
Enabling both C2OUT and P1B will cause
a conflict on RC4 and create unpredictable
results. Therefore, if C2OUT is enabled,
the ECCP can not be used in Half-Bridge
or Full-Bridge mode and vice-versa.
C2OUT
ANS7
Bit 7
Port/Peripheral Select signals selects between
port data and peripheral output.
—
—
Q
Q
Q
Q
SUMMARY OF REGISTERS ASSOCIATED WITH PORTC
C1OUT
BLOCK DIAGRAM OF RC4
ANS6
Bit 6
—
—
1
0
TRISC5
C2INV
ANS5
Bit 5
RC5
TRISC4
C1INV
ANS4
V
Bit 4
V
RC4
DD
SS
I/O Pin
TRISC3
ANS3
Bit 3
RC3
CIS
TRISC2
ANS2
Bit 2
CM2
RC2
4.3.6
The RC5 is configurable to function as one of the
following:
• a general purpose I/O
• a digital input/output for the Enhanced CCP
FIGURE 4-10:
PORTC
PORTC
TRISC
TRISC
Data bus
WR
WR
RD
RD
TRISC1
To Enhanced CCP
ANS1
D
D
Bit 1
CM1
RC1
CK
CK
RC5/CCP1/P1A
Q
Q
Q
Q
TRISC0
ANS0
CCP1OUT
Bit 0
CM0
RC0
BLOCK DIAGRAM OF RC5
PIN
© 2007 Microchip Technology Inc.
CCP1OUT
Enable
1111 1111
0000 0000
--xx 0000
--11 1111
POR, BOR
Value on:
1
0
1111 1111
0000 0000
--uu uu00
--11 1111
V
V
Value on
all other
DD
Resets
SS
I/O Pin