LM3940IS-3.3 National Semiconductor, LM3940IS-3.3 Datasheet - Page 6

V REG LDO +3.3V, 3940, SOT-263-3

LM3940IS-3.3

Manufacturer Part Number
LM3940IS-3.3
Description
V REG LDO +3.3V, 3940, SOT-263-3
Manufacturer
National Semiconductor
Datasheet

Specifications of LM3940IS-3.3

Primary Input Voltage
5V
Output Voltage
3.3V
Dropout Voltage Vdo
110mV
No. Of Pins
3
Output Current
1A
Voltage Regulator Case Style
SOT-263
Operating Temperature Range
-40°C To +125°C
Svhc
No
Output Voltage Fixed
3.3V
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Application Hints
EXTERNAL CAPACITORS
The output capacitor is critical to maintaining regulator sta-
bility, and must meet the required conditions for both ESR
(Equivalent Series Resistance) and minimum amount of ca-
pacitance.
MINIMUM CAPACITANCE:
The minimum output capacitance required to maintain sta-
bility is 33 µF (this value may be increased without limit).
Larger values of output capacitance will give improved tran-
sient response.
ESR LIMITS:
The ESR of the output capacitor will cause loop instability if
it is too high or too low. The acceptable range of ESR plotted
versus load current is shown in the graph below. It is essen-
tial that the output capacitor meet these requirements,
or oscillations can result.
It is important to note that for most capacitors, ESR is
specified only at room temperature. However, the designer
must ensure that the ESR will stay inside the limits shown
over the entire operating temperature range for the design.
For aluminum electrolytic capacitors, ESR will increase by
about 30X as the temperature is reduced from 25˚C to
−40˚C. This type of capacitor is not well-suited for low tem-
perature operation.
Solid tantalum capacitors have a more stable ESR over
temperature, but are more expensive than aluminum elec-
trolytics. A cost-effective approach sometimes used is to
parallel an aluminum electrolytic with a solid Tantalum, with
the total capacitance split about 75/25% with the Aluminum
being the larger value.
If two capacitors are paralleled, the effective ESR is the
parallel of the two individual values. The “flatter” ESR of the
Tantalum will keep the effective ESR from rising as quickly at
low temperatures.
FIGURE 1. ESR Limits
01208005
6
HEATSINKING
A heatsink may be required depending on the maximum
power dissipation and maximum ambient temperature of the
application. Under all possible operating conditions, the junc-
tion temperature must be within the range specified under
Absolute Maximum Ratings.
To determine if a heatsink is required, the power dissipated
by the regulator, P
The figure below shows the voltages and currents which are
present in the circuit, as well as the formula for calculating
the power dissipated in the regulator:
I
P
The next parameter which must be calculated is the maxi-
mum allowable temperature rise, T
lated by using the formula:
T
Where: T
Using the calculated values for T
mum allowable value for the junction-to-ambient thermal
resistance, θ
θ
IMPORTANT: If the maximum allowable value for θ
found to be ≥ 60˚C/W for the TO-220 package, ≥ 80˚C/W for
the TO-263 package, or ≥174˚C/W for the SOT-223 pack-
age, no heatsink is needed since the package alone will
dissipate enough heat to satisfy these requirements.
If the calculated value for θ
heatsink is required.
HEATSINKING TO-220 PACKAGE PARTS
The TO-220 can be attached to a typical heatsink, or se-
cured to a copper plane on a PC board. If a copper plane is
to be used, the values of θ
the next section for the TO-263.
IN
D
(JA)
R
= I
= (V
(max) = T
L
= T
+ I
IN
T
A
G
− V
R
FIGURE 2. Power Dissipation Diagram
J
(max) is the maximum ambient temperature
(max)/P
(max) is the maximum allowable junction tem-
OUT
(JA)
J
) I
(max) − T
L
, can now be found:
+ (V
perature, which is 125˚C for commercial
grade parts.
which
application.
D
D
, must be calculated.
IN
) I
G
A
will
(JA)
(max)
(JA)
will be the same as shown in
be
falls below these limits, a
R
(max) and P
R
encountered
(max). This is calcu-
D
, the maxi-
01208006
in
(JA)
the
is

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