ECOG1XE01A6 CYAN, ECOG1XE01A6 Datasheet - Page 51
ECOG1XE01A6
Manufacturer Part Number
ECOG1XE01A6
Description
IC, 16BIT MCU, ECOG1X, 70MHZ, QFN-68
Manufacturer
CYAN
Datasheet
1.ECOG1X14Z5.pdf
(95 pages)
Specifications of ECOG1XE01A6
Controller Family/series
ECOG1X
No. Of I/o's
20
Ram Memory Size
8KB
Cpu Speed
70MHz
No. Of Timers
8
Digital Ic Case Style
QFN
Core Size
16 Bit
Program Memory Size
64KB
Embedded Interface Type
I2C, JTAG, SPI, UART
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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4 August 2009
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Applications using the analogue inputs or outputs with the internal reference voltage must have
external decoupling capacitors connected to the Vref pin. The recommended decoupling on this
pin is a 100nF ceramic capacitor in parallel with a 4.7µF low ESR electrolytic capacitor.
The low frequency PLL requires external low pass filter components connected to the FIL pin, as
shown. The filter consists of a 2.2nF capacitor from FIL to AGND, in parallel with a 68nF capacitor
and an 8.2kΩ resistor in series.
The Rext pin for the external resistor to set the frequency of the relaxation oscillator is available
only on the 208BGA package. On devices in this package, the relaxation oscillator frequency can
be adjusted over a range from 1MHz to 11MHz by changing the value of an external resistor
connected from the Rext pin to GND. In the smaller 68QFN and 100QFN packages, the relaxation
oscillator runs at the frequency corresponding to an open circuit at the Rext pin with the external
resistor not fitted, nominally 1MHz.
The ULPI_CLK input should be pulled low or tied to GND if the ULPI high-speed USB connection
is not used.
The nTest pin is not used in normal applications and should be connected to VDD, either directly
or via a 100kΩ pull-up resistor.
eCOG and CyanIDE are registered trademarks of Cyan Holdings plc
Figure 5: Low PLL filter external components
eCOG1X Microcontroller Product Family
Figure 4: Vref decoupling
www.cyantechnology.com
Version 1.15
51
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