UPD78F9502MA-CAC-A NEC, UPD78F9502MA-CAC-A Datasheet - Page 120
UPD78F9502MA-CAC-A
Manufacturer Part Number
UPD78F9502MA-CAC-A
Description
8BIT MCU, 4K FLASH, 128B RAM, SMD
Manufacturer
NEC
Datasheet
1.UPD78F9502MA-CAC-A.pdf
(229 pages)
Specifications of UPD78F9502MA-CAC-A
Controller Family/series
UPD78F
No. Of I/o's
8
Ram Memory Size
128Byte
Cpu Speed
10MHz
No. Of Timers
2
No. Of Pwm
RoHS Compliant
Core Size
8bit
Program Memory Size
4KB
Oscillator Type
External, Internal
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11.2 Configuration of Power-on-Clear Circuit
11.3 Operation of Power-on-Clear Circuit
and an internal reset signal is generated when V
120
POC detection voltage
(V
Internal reset signal
Supply voltage (V
The block diagram of the power-on-clear circuit is shown in Figure 11-1.
In the power-on-clear circuit, the supply voltage (V
POC
= 2.1 V ±0.1 V)
Figure 11-2. Timing of Internal Reset Signal Generation in Power-on-Clear Circuit
DD
)
V
DD
Figure 11-1. Block Diagram of Power-on-Clear Circuit
Reference
voltage
source
CHAPTER 11 POWER-ON-CLEAR CIRCUIT
Preliminary User’s Manual U18681EJ1V0UD
DD
+
< V
V
DD
DD
POC
) and detection voltage (V
, and an internal reset is released when V
Internal reset signal
POC
= 2.1 V 0.1 V) are compared,
DD
≥ V
POC
.
Time
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