FM3104-G Ramtron, FM3104-G Datasheet
FM3104-G
Specifications of FM3104-G
Available stocks
Related parts for FM3104-G
FM3104-G Summary of contents
Page 1
... Pre-Production FM3104/16/64/256 Integrated Processor Companion with Memory Features High Integration Device Replaces Multiple Parts • Serial Nonvolatile Memory • Real-time Clock (RTC) • Low Voltage Reset • Watchdog Timer • Early Power-Fail Warning/NMI • Two 16-bit Event Counters • Serial Number with Write-lock for Security Ferroelectric Nonvolatile RAM • ...
Page 2
... Device Select inputs Clock Calibration and Early Power-Fail Output Reset Input/Output Early Power-fail Input Crystal Connections Serial Data Serial Clock Battery-Backup Supply Supply Voltage Ground Ordering Part Number FM31256-G FM31256-GTR (tape&reel) FM3164-G FM3164-GTR (tape&reel) FM3116-G FM3116-GTR (tape&reel) FM3104-G FM3104-GTR (tape&reel) Page ...
Page 3
... VSS Supply Ground Rev. 2.0 Jan. 2011 Special Function Watchdog Registers LV Detect S/N RTC Cal. 1.2V 512Hz Switched Power Nonvolatile Figure 1. Block Diagram FM3104/16/64/256 FRAM Array LockOut RTC Registers X1 RTC X2 CNT1 Event Counters CNT2 Battery Backed <3.6V and >3.6V and no backup ...
Page 4
... Figure 2 below illustrates the reset operation in response to the V VDD VTP RST Figure 2. Low Voltage Reset The bits VTP1 and VTP0 control the trip point of the low voltage detect circuit. They are located in register 0Bh, bits 1 and 0. FM3104/16/64/256 WP1 WP0 ...
Page 5
... PFI pin to the unregulated power supply via a resistor is below divider. An application circuit is shown below. /RST To MCU CAL/PFO NMI input WDE Figure 5. Comparator as Early Power-Fail Warning FM3104/16/64/256 RST FM31xx Reset Switch FM31xx drives 100 ms (min.) Figure 4. Manual Reset the need for additional ...
Page 6
... The registers are frozen and will not be updated again until the R bit is cleared used for reading the time. Setting the W bit to 1 locks the user registers. Clearing causes the values in the user registers FM3104/16/64/256 Page ...
Page 7
... Note: systems using lithium batteries should clear the VBC bit prevent battery charging. The V circuitry includes an internal 1 K BAK resistor as a safety element. BAK FM3104/16/64/256 pin can BAK pin BAK reaches BAK without an external DD maximum voltage specification ...
Page 8
... X1/X2 pads. The X1 and X2 trace lengths should be less than 5 mm. The use of a ground plane on the backside or inner board layer is preferred. See layout example. Red is the top layer, green is the bottom layer. FM3104/16/64/256 512 Hz W Update Logic ...
Page 9
... VDD SCL SDA X2 X1 PFI VBAK Layout for Surface Mount Crystal (red = top layer, green = bottom layer) Rev. 2.0 Jan. 2011 FM3104/16/64/256 VDD SCL SDA X2 X1 PFI VBAK Layout for Through Hole Crystal (red = top layer, green = bottom layer) Page ...
Page 10
... FM3104/16/64/256 000000 100001 100010 100011 100100 100101 100110 100111 101000 101001 101010 101011 101100 101101 101110 101111 110000 110001 110010 110011 ...
Page 11
... FM3104/16/64/256 D0 Function Range Serial Number 7 FFh Serial Number 6 FFh Serial Number 5 FFh Serial Number 4 FFh Serial Number 3 FFh Serial Number 2 FFh Serial Number 1 FFh ...
Page 12
... D3 SN.45 SN.44 SN. SN.37 SN.36 SN. SN.29 SN.28 SN. SN.21 SN.20 SN. SN.13 SN.12 SN. SN.5 SN.4 SN C2.13 C2.12 C2. C2.5 C2.4 C2 C1.13 C1.12 C1. C1.5 C1.4 C1.3 FM3104/16/64/256 SN.58 SN.57 SN. SN.50 SN.49 SN. SN.42 SN.41 SN. SN.34 SN.33 SN. SN.26 SN.25 SN. SN.18 SN.17 SN. SN.10 SN.9 SN SN.2 SN.1 SN C2.10 C2.9 C2 C2.2 C2 ...
Page 13
... Invalid – default 100 ms 100 ms 200 ms 300 2000 ms 2100 ms 2200 2900 ms 3000 ms Disable counter Rev. 2.0 Jan. 2011 WP1 WP0 WP1 WP0 VTP1 VTP0 WDT4 WDT3 WDT4 WDT3 WDT2 WDT1 WDT0 FM3104/16/64/256 C2P C1P VBC VTP1 VTP0 WDT2 WDT1 WDT0 Page ...
Page 14
... POR bit will be set must year.1 10 year.0 Year Month Month date.1 10 date.0 Date hours.1 10 hours.0 Hours min.1 10 min.0 Min sec.1 10 sec.0 Seconds.3 FM3104/16/64/256 WR2 WR1 WR0 Year.2 Year.1 Year Month.2 Month.1 Month Date.2 Date.1 Date Day.2 Day.1 Day Hours2 Hours.1 Hours Min.2 Min.1 Min Seconds ...
Page 15
... Battery-backed, read/write. Reserved Reserved bits. Do not use. Should remain set to 0. Rev. 2.0 Jan. 2011 CALS CAL.4 CAL Reserved Reserved Reserved FM3104/16/64/256 CAL.2 CAL.1 CAL CAL W R Page ...
Page 16
... NACK the last byte. If the receiver ACKs the last byte, this will cause the FM31xx to attempt to drive the bus on the next clock while the master is sending a new command such as a Stop. FM3104/16/64/256 0 Data bit Acknowledge (Transmitter) ...
Page 17
... Acknowledge condition. Any number of sequential bytes may be written. If the end of the address range is reached internally, the address counter will wrap to 0000h. Internally, the actual memory write occurs th after the 8 data bit is transferred. It will be complete before the Acknowledge is sent. Therefore, if the FM3104/16/64/256 Page ...
Page 18
... The figures below show the proper operation for current address reads. Selective (Random) Read There is a simple technique that allows a user to select a random address location as the starting point for a read operation. This involves using the first FM3104/16/64/256 Stop A Data Byte A P Stop ...
Page 19
... However, a write sequence always requires an address to be supplied. Address Slave Address 1 A Data Byte Acknowledge Data Acknowledge 1 A Data Byte A Acknowledge Data Figure 17. Sequential Memory Read FM3104/16/64/256 No Acknowledge Stop Acknowledge Stop Data Byte 1 P Page ...
Page 20
... Rev. 2.0 Jan. 2011 Start A Address LSB A S Acknowledge Address & Data Address Acknowledge Figure 19. Byte Register Write Address Byte A12 A11 A10 A12 A11 A10 A10 FM3104/16/64/256 No Acknowledge Address Slave Address 1 A Data Byte 1 P Data A Data Byte Address Byte ...
Page 21
... 1.6 -0.3 < 2.5V) -0.3 DD -0.3 0 < 2.5V) V – 0.5 DD BAK 0 FM3104/16/64/256 Ratings -1.0V to +7.0V -1.0V to +7.0V * and V ≤ V +1. -1.0V to +4.5V -55°C to +125°C 260° C 2kV 1.25kV 100V MSL Typ Max Units Notes 5 500 µ ...
Page 22
... Min Max Min 0 100 0 4.7 1.3 4.0 0.6 3 4.7 1.3 4.0 0.6 4.7 0 250 100 1000 300 4.0 0 3.0V) DD FM3104/16/64/256 Typ Max Units 0 400 KΩ KΩ MΩ 1.20 1.225 V - 100 mV , and V < V max. BAK BAK BAK Max Min Max Units 400 0 ...
Page 23
... Rev. 2.0 Jan. 2011 = 2.7V to 5.5V) DD Min >V 100 DD TP 100 100 t waveform. > V and t satisfied RPU t RPU = 2.7V to 5.5V) DD FM3104/16/64/256 Max Units Notes 200 µ µs/V 1,2 - 1,2 µs/V 200 ms 2*t ms DOG DOG 0 10 MHz Min ...
Page 24
... Write Bus Timing SCL t SU:STO SDA Start Rev. 2.0 Jan. 2011 HIGH 1/f SCL t AA Stop Start t HD:DAT t t SU:DAT HD:STA Stop Start FM3104/16/64/256 Equivalent AC Load Circuit 5.5V 1700 Ω Output 100 LOW t HD:DAT t SU:DAT t DH Acknowledge t AA Acknowledge Page ...
Page 25
... XXXXXX= part number, P= package type (G=”Green”/RoHS) R=rev, LLLLLLL= lot code RIC=Ramtron Int’l Corp, YY=year, WW=work week FM31256-G D90007G1 RIC 1106 FM3104/16/64/256 Recommended PCB Footprint . . . 7.70 3. 0.65 1.27 0.25 0.50 0.19 ° 45 0.25 0° ...
Page 26
... Revision History Revision Date 2.0 1/31/2011 Rev. 2.0 Jan. 2011 Summary Pre-Production status. Rev D. Changed I to Backup Power section (p.7). FM3104/16/64/256 and V specs. Added curves BAK BAK Page ...