NTE2117 NTE ELECTRONICS, NTE2117 Datasheet

no-image

NTE2117

Manufacturer Part Number
NTE2117
Description
IC, DRAM, 16KBIT, DIP-16
Manufacturer
NTE ELECTRONICS
Datasheet

Specifications of NTE2117

Memory Type
DRAM - NMOS
Memory Configuration
16K X 1
Access Time
200ns
Page Size
16Kbit
Memory Case Style
DIP
No. Of Pins
16
Operating Temperature Range
0°C To +70°C
Termination Type
Through Hole
Filter Terminals
Through Hole
NTE2117
Integrated Circuit
16K Dynamic Random Access Memory (RAM)
Description:
The NTE2117 is a new generation MOS dynamic random access memory circuit in a 16−Lead DIP
type package organized as 16,384 x 1−bit and incorporates advanced circuit techniques designed
to provide wide operating margins, both internally and to the system user, while achieving higher per-
formance levels in both speed and power.
System oriented features include ±10% tolerance on all power supplies, direct interfacing capability
with high performance logic families such as Schottky TTL, maximum input noise immunity to mini-
mize “false triggering” of the inputs (a common cause of soft errors), on−chip address and data regis-
ters which eliminate the need for interface registers, and two chip select methods to allow the user
to determine the appropriate speed/power characteristics of the memory system. The NTE2117 also
incorporates several flexible timing/operating modes. In addition to the usual read, write, and read−
modify−write cycles, this device is capable of delayed write cycles, page−mode operation, and RAS−
Only refresh. Proper control of the clock inputs (RAS, CAS, and WRITE) allows common I/O capabili-
ty, two dimensional chip selection, and extended page boundaries (when operating in page mode).
Features:
D Fast Access Time: 200ns, 375ns cycle
D ±10% Tolerance on All Power Supplies (+12V, ±5V)
D Low Power: 462mW Active, 20W Standby (Max)
D Output Data Controlled bt CAS and Unlatched at End of Cycle to Allow Two Dimensional Chip
Selection and Extended Page Boundary.
D Common I/O Capability using “Early Write” Operation
D Read−Modify−Write, RAS−Only Refresh, and Page−Mode Capability
D All Inputs TTL Compatible, Low Capacitance, and Protected Against Static Charge
D 128 Refresh Cycles
D ECL Compatible on V
Power Supply (−5.7V)
BB
Absolute Maximum Ratings: (Note 1)
Voltage on Any Pin Relative to V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
−0.5V to +20V
BB
Voltage on V
, V
Supplies Relative to V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
−1V to +15V
DD
CC
SS
V
− V
(V
− V
> 0V)
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
0V
BB
SS
DD
SWS
Ambient Operating Temperature, T
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
0° to +70°C
A
Storage Temperature Range, T
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
−55° to +125°C
stg
Short−Circuit Output Current
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
50mA
Power Dissipation, P
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1W
D

Related parts for NTE2117

NTE2117 Summary of contents

Page 1

... Dynamic Random Access Memory (RAM) Description: The NTE2117 is a new generation MOS dynamic random access memory circuit in a 16−Lead DIP type package organized as 16,384 x 1−bit and incorporates advanced circuit techniques designed to provide wide operating margins, both internally and to the system user, while achieving higher per- formance levels in both speed and power. System oriented features include ± ...

Page 2

Note 1. Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the ...

Page 3

Note 6. I and I depend upon output loading. During readout of high level data V CC1 CC4 nected through a low impedance (135Ω Typ) to data out. At all other times I leakage currents only. Electrical Characteristics and Recommended ...

Page 4

Parameter CAS to WRITE Delay RAS to WRITE Delay Note specified here for operation at frequencies rates with reduced ambient temperatures and higher power dissipation is permissible, how- ever, provided AC operating parameters are ...

Page 5

Pin Connection Diagram WRITE RAS VDD .870 (22.0) Max .100 (2.54) .700 (17.78 CAS 14 D OUT 13 A6 ...

Related keywords