LCMXO2280C-5TN100C LATTICE SEMICONDUCTOR, LCMXO2280C-5TN100C Datasheet - Page 177
LCMXO2280C-5TN100C
Manufacturer Part Number
LCMXO2280C-5TN100C
Description
MACHXO PLD FLASH, SCRAM 1.8V, SMD
Manufacturer
LATTICE SEMICONDUCTOR
Series
MachXOr
Datasheet
1.LCMXO1200C-5TN144C.pdf
(244 pages)
Specifications of LCMXO2280C-5TN100C
Cpld Type
FLASH
No. Of Macrocells
1140
No. Of I/o's
73
Propagation Delay
3.6ns
Global Clock Setup Time
1.1ns
Frequency
600MHz
Supply Voltage Range
1.71V To 3.465V
Operating
RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
LCMXO2280C-5TN100C
Manufacturer:
Lattice
Quantity:
70
Company:
Part Number:
LCMXO2280C-5TN100C
Manufacturer:
Lattice Semiconductor Corporation
Quantity:
10 000
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Lattice Semiconductor
Secondary Clock/CE/LSR Mux Connectivity
The Secondary Clock/CE/LSR Mux input sources include:
• Primary Clock input pins
• From routing
The Secondary Clock/CE/LSR Mux outputs feed four clock input switch boxes and eight control input switch boxes
in each PFU. Each slice includes one clock input switch box and two control input switch boxes, one for CE (Clock
Enable) and the other for LSR (Local Set/Reset).
Figure 10-11. Secondary Clock/Control Net (All MachXO)
Primary Clock and Secondary Clock/CE/LSR Distribution Network
The Clock Input Switch Box and Control Input Switch Box are described in Figure 10-12 and Figure 10-13.
Figure 10-14 shows the entire connectivity of the MachXO clock distribution network for each PFU.
Figure 10-12. Clock Switch Mux to Each PFU Slice
Figure 10-13. Control Switch Mux to Each PFU Slice
Global Clocks
From Routing
Secondary Clock
Secondary Clock
Primary Clock
/CE/LSR
VCC/GND
Routing
Routing
GND
12
4
16
16
4
3
2
3
1
10-15
To PFU SLICE
To PFU SLICE
SCLK0/CE/LSR
SCLK1/CE/LSR
SCLK2/CE/LSR
SCLK3/CE/LSR
CLK
CE/LSR
Design and Usage Guide
MachXO sysCLOCK PLL
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