ZL6100EVAL1Z Intersil, ZL6100EVAL1Z Datasheet - Page 27

• Manufacturer Part Number: ZL6100EVAL1Z
• Description: EVAL BOARD USB ZL6100
• Manufacturer: Intersil

Specifications of ZL6100EVAL1Z

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

as low as 0V, where V
point determined by the V0 and V1 pins. A safety feature
prevents the user from configuring the output voltage to
exceed V
The margin limits and the MGN command can both be set
individually through the I
transition rate between the nominal output voltage and either
margin limit can be configured through the I
Please refer to Application Note AN2033 for detailed
instructions on modifying the margining configurations.
I
The ZL6100 provides an I
enables the user to configure all aspects of the device
operation as well as monitor the input and output
parameters. The ZL6100 can be used with any standard 2-
wire I
with SMBus version 2.0 and includes an SALRT line to help
mitigate bandwidth limitations related to continuous fault
monitoring. Pull-up resistors are required on the I
as specified in the SMBus 2.0 specification. The ZL6100
accepts most standard PMBus commands. When controlling
the device with PMBus commands, it is recommended that
the enable pin is tied to SGND.
I
When communicating with multiple SMBus devices using the
I
address so the host can distinguish between the devices.
The device address can be set according to the pin-strap
options listed in Table 22. Address values are right-justified.
If additional device addresses are required, a resistor can be
connected to the SA0 pin according to Table 23 to provide
up to 25 unique device addresses. In this case, the SA1 pin
should be tied to SGND.
2
2
2
C/SMBus interface, each device must have its own unique
C/SMBus Communications
C/SMBus Device Address Selection
SA1
2
TABLE 22. SMBus DEVICE ADDRESS SELECTION
C host device. In addition, the device is compatible
NOM
OPEN
HIGH
LOW
+ 10% under any conditions.
NOM
2
C/SMBus interface. Additionally, the
2
is the nominal output voltage set
LOW
C/SMBus digital interface that
0x20
0x23
0x26
27
OPEN
0x21
0x24
0x27
SA0
2
C interface.
2
Reserved
C/SMBus
HIGH
0x22
0x25
ZL6100
If more than 25 unique device addresses are required or if
other SMBus address values are desired, both the SA0 and
SA1 pins can be configured with a resistor to SGND
according to Equation 38 and Table 24.
SMBusaddress
Using this method, the user can theoretically configure up to
625 unique SMBus addresses, however the SMBus is
inherently limited to 128 devices so attempting to configure
an address higher than 128 (0x80) will cause the device
address to repeat (i.e, attempting to configure a device
address of 129 (0x81) would result in a device address of 1).
Therefore, the user should use index values 0-4 on the SA1
pin and the full range of index values on the SA0 pin, which
will provide 125 device address combinations.
Note that the SMBus address 0x4B is reserved for device
test and cannot be used in the system.
(kΩ)
12.1
13.3
14.7
16.2
17.8
19.6
21.5
23.7
26.1
28.7
31.6
(kΩ)
12.1
13.3
14.7
16.2
17.8
19.6
21.5
23.7
26.1
28.7
31.6
R
R
10
11
10
11
SA
SA
TABLE 24. SMBus ADDRESS INDEX VALUES
TABLE 23. SMBus ADDRESS VALUES
=
25
SA0 or SA1
ADDRESS
( •
SMBus
INDEX
0x0C
0x00
0x01
0x02
0x03
0x04
0x05
0x06
0x07
0x08
0x09
0x0A
0x0B
SA1
10
11
12
0
1
2
3
4
5
6
7
8
9
index )
+
(kΩ)
34.8
38.3
42.2
46.4
51.1
56.2
61.9
68.1
82.5
90.9
(kΩ)
34.8
38.3
42.2
46.4
51.1
56.2
61.9
68.1
82.5
90.9
R
(
R
100
100
75
75
SA0 index ) in decimal
SA
SA
December 15, 2010
SA0 or SA1
ADDRESS
(
SMBus
INDEX
0x0D
0x0E
0x0F
0x10
0x12
0x13
0x14
0x15
0x16
0x17
0x18
0x11
13
14
15
16
17
18
19
20
21
22
23
24
(EQ. 38)
FN6876.2
)