ISL62882IRTZ Intersil, ISL62882IRTZ Datasheet - Page 17

• Manufacturer Part Number: ISL62882IRTZ
• Description: IC REG PWM 2PHASE BUCK 40TQFN
• Manufacturer: Intersil

Specifications of ISL62882IRTZ

• Applications: Controller, Intel IMVP-6.5™
• Voltage - Input: 5 V ~ 25 V
• Number Of Outputs: 1
• Voltage - Output: 0.0125 V ~ 1.5 V
• Operating Temperature: -40°C ~ 100°C
• Mounting Type: *
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

FIGURE 14. DIFFERENTIAL-SENSING CURRENT
Sometimes, it is difficult to implement symmetrical
layout. For the circuit Figure 13 shows, asymmetric
layout causes different R
imbalance. Figure 14 shows a differential-sensing current
balancing circuit recommended for ISL62882. The
current sensing traces should be routed to the inductor
pads so they only pick up the inductor DCR voltage. Each
ISEN pin sees the average voltage of two sources: its
own phase inductor phase-node pad, and the other
phase inductor output side pad. Equations 7 and 8 give
the ISEN pin voltages:
The ISL62882 will make V
Rewriting Equation 9 gives:
Therefore:
Current balancing (I
is R
effect.
Since the slave ripple capacitor voltages mimic the
inductor currents, R
excellent current balancing during steady state and
dynamic operations. Figure 15 shows current balancing
performance of the ISL62882 evaluation board with load
transient of 15A/50A at different rep rates. The inductor
currents follow the load current dynamic change with the
output capacitors supplying the difference. The inductor
currents can track the load current well at a low rep rate,
but cannot keep up when the rep rate gets into the
hundred-kHz range, where it’s out of the control loop
bandwidth. The controller achieves excellent current
balancing in all cases.
R
V
V
V
V
INTERNAL
ISEN1
ISEN2
1p
1p
dcr1
TO IC
dcr1
+
–
ISEN2
ISEN1
V
V
×
1n
2n
I
L1
=
=
= R
=
V
V
=
=
1p
2p
V
V
dcr2
BALANCING CIRCUIT
R
2p
2p
+
+
dcr2
Cs
Cs
PHASE2
V
V
–
+
PHASE1
. R
2n
1n
V
V
×
2n
1n
pcb1
I
Rs
Rs
Rs
Rs
L2
3™
L1
= I
V2p
V1p
modulator can naturally achieve
and R
pcb1
L2
17
ISEN1
) will be achieved when there
pcb2
and R
L1
L2
= V
I
I
L2
L1
will not have any
pcb2
Rdcr2
Rdcr1
ISEN2
thus current
V2n
V1n
. So there are:
ISL62882, ISL62882B
Rpcb1
Rpcb2
(EQ. 10)
(EQ. 11)
(EQ. 7)
(EQ. 8)
(EQ. 9)
V
O
FIGURE 15. ISL62882 EVALUATION BOARD CURRENT
BALANCING DURING DYNAMIC OPERATION.
Ch1: IL1, Ch2: I
REP RATE = 100kHz
REP RATE = 200kHz
REP RATE = 10kHz
REP RATE = 50kHz
REP RATE = 25kHz
Ioad
, Ch3: IL2
FN6890.3