ISL9305IRTBFNCZ-T Intersil, ISL9305IRTBFNCZ-T Datasheet - Page 3
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ISL9305IRTBFNCZ-T
Manufacturer Part Number
ISL9305IRTBFNCZ-T
Description
IC PMIC 800MA 3MHZ 16TQFN
Manufacturer
Intersil
Datasheet
1.ISL9305IRTAANLZ-T.pdf
(17 pages)
Specifications of ISL9305IRTBFNCZ-T
Topology
Step-Down (Buck) (2), Linear (LDO) (2)
Function
Any Function
Number Of Outputs
4
Frequency - Switching
3MHz
Voltage/current - Output 1
0.8 V ~ 5.5 V, 800mA
Voltage/current - Output 2
0.8 V ~ 5.5 V, 800mA
Voltage/current - Output 3
0.9 V ~ 3.3 V, 350mA
W/led Driver
No
W/supervisor
No
W/sequencer
No
Voltage - Supply
1.5 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
*
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Pin Configuration
Pin Descriptions
NUMBER
(TQFN)
E-pad
PIN
11
12
13
14
15
10
16
1
2
3
4
5
6
7
8
9
GNDDCD2
GNDDCD1
VINDCD1
VINDCD2
VINLDO1
VINLDO2
GNDLDO
VOLDO1
VOLDO2
DCDPG
NAME
E-pad
SCLK
SDAT
SW2
SW1
FB1
FB2
Input voltage for buck converter DCD1 and it also serves as the power supply pin for the whole internal digital/ analog
circuits.
Feedback pin for DCD1, connect external voltage divider resistors between DCDC1 output, this pin and ground. For
fixed output versions, connect this pin directly to the DCD1 output.
I
I
Input voltage for LDO1.
Output voltage of LDO1.
Output voltage of LDO2.
Input voltage for LDO2.
Power ground for LDO1 and LDO2.
The DCDPG pin is an open-drain output to indicate the state of the DCD1/DCD2 output voltages. When both DCD1
and DCD2 are enabled, the output is released to be pulled high by an external pull-up resistor if both converter
voltages are within the power-good range. The pin will be pulled low if either DCD is outside their range. When only
one DCD is enabled, the state of the enabled DCD’s output will define the state of the DCDPG pin. The DCDPG state
can be programmed for a delay of up to 200ms before being released to rise high. The programming range is
1ms~200ms through the I
Feedback pin for DCD2, connect external voltage divider resistors between DCD2 output, this pin and ground. For
fixed output versions, connect this pin directly to the DCD2 output.
Input voltage for buck converter DCD2.
Switching node for DCD2, connect to one terminal of the inductor.
Power ground for DCD2.
Power ground for DCD1.
Switching node for DCD1, connect to one terminal of the inductor.
Exposed Pad. Connect to system ground.
3
2
2
C interface clock pin.
C interface data pin.
VINDCD1
SCLK
SDAT
FB1
2
C interface.
1
2
3
4
(16 LD 4X4 TQFN)
ISL9305
16
5
TOP VIEW
ISL9305
15
6
E-PAD
14
7
13
8
DESCRIPTION
12
10
11
9
GNDLDO
VINDCD2
DCDPG
FB2
November 8, 2010
FN7605.0