XRD9827ACD-F Exar Corporation, XRD9827ACD-F Datasheet
XRD9827ACD-F
Specifications of XRD9827ACD-F
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XRD9827ACD-F Summary of contents
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... The DC reference is internally subtracted from the input signal. The CIS configuration can also be used in other appli- cations that do not require CDS function, such as low cost data acquisition. Temperature Range Part Number 0°C to +70°C XRD9827ACD 0°C to +70°C XRD9827ACU XRD9827 December 2000-2 ...
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XRD9827 CIS REF Circuit RED Triple S/H & GRN 3-1 MUX BLU VDCEXT Rev. 3.00 VBG CIS REF Circuit + BUFFER _ DC Reference V DCREF INT/EXT_V DCREF CLP DC/AC AGND CIS/CCD VRT CIS CCD Figure 1. Functional Block Diagram ...
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... Blue Input 18 GRN Green Input 19 RED Red Input 20 AVDD Analog Power Supply Rev. 3.00 DVDD AVDD 1 20 DB0 2 19 DB1 GRN 3 18 DB2 4 17 DB3 5 16 XRD9827ACD DB4 AGND DB7/LD DGND 10 11 20-Lead SOIC 3 XRD9827 RED BLU VDCEXT VREF+ SYNCH CLAMP ADCCLK ...
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XRD9827 ELECTRICAL CHARACTERISTICS Test Conditions: AV =DV =5V, ADCCLK=6MHz, 50% Duty Cycle Symbol Parameter Power Supplies AV Analog Power Supply DD DV Digital I/O Power Supply DD I Supply Current DD IDD Power Down Power Supply Current ...
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ELECTRICAL CHARACTERISTICS (CONT'D) Test Conditions: AV =DV =5V, ADCCLK=6MHz, 50% Duty Cycle Symbol Parameter Buffer Specifications I Input Leakage Current IL CIN Input Capacitance VIN AC Input Voltage Range PP AC Input Voltage Range VIN DC Input ...
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XRD9827 ELECTRICAL CHARACTERISTICS (CONT'D) Test Conditions: AV =DV = 5V, ADCCLK=6MHz, 50% Duty Cycle Symbol Parameter System Specifications (MUX + Buffer + PGA + ADC) SYS System DNL DNL SYS System Linearity LIN SYS System Gain Error ...
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ELECTRICAL CHARACTERISTICS (CONT'D) Test Conditions: AV =DV =5V, ADCCLK=6MHz, 50% Duty Cycle Symbol Parameter Digital Output Specifications V Output High Voltage OH V Output Low Voltage OL I Output High-Z Leakage Current Oz C Output Capacitance OUT ...
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XRD9827 ELECTRICAL CHARACTERISTICS Test Conditions: AV =DV =3V, ADCCLK=6MHz, 50% Duty Cycle Symbol Parameter Power Supplies AV Analog Power Supply DD DV Digital I/O Power Supply DD I Supply Current DD IDD Power Down Power Supply Current ...
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ELECTRICAL CHARACTERISTICS (CONT'D) Test Conditions: AV =DV =3V, ADCCLK=6MHz, 50% Duty Cycle Symbol Parameter Buffer Specifications I Input Leakage Current IL CIN Input Capacitance VIN AC Input Voltage Range PP AC Input Voltage Range VIN DC Input ...
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XRD9827 ELECTRICAL CHARACTERISTICS (CONT'D) Test Conditions: AV =DV = 3V, ADCCLK=6MHz, 50% Duty Cycle Symbol Parameter System Specifications (MUX + Buffer + PGA + ADC) SYS System DNL DNL SYS System Linearity LIN SYS System Gain Error ...
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ELECTRICAL CHARACTERISTICS (CONT'D) Test Conditions: AV =DV =3V, ADCCLK=6MHz, 50% Duty Cycle Symbol Parameter Digital Output Specifications V Output High Voltage OH V Output Low Voltage OL I Output High-Z Leakage Current Oz C Output Capacitance OUT ...
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XRD9827 THEORY OF OPERATION CIS Configuration (Contact Image Sensor) The XRD9827 has two configurations for CIS applications. Each configuration is set by the control registers accessed through the serial port. Mode 1. DC Coupled If the CIS does not have ...
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XRD9827 C RED N/C N/C X Figure 3. Application with Offset in the Range (-100mv to 500mv) The input is added to VRB before the signal passes through the ADC. If the CIS output is ...
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XRD9827 C RED I N/C S N/C VDCEXT DC REFERENCE Figure 4. Application with Offset Greater Than (-100mv to 500mv) The DC reference voltage applied to VDCEXT does not have to be accurate. The internal offset DAC voltage is still ...
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VCC (5V - 15V) 19 RED 18 N/C GRN AVDD N/C BLU S 16 VDCEXT 15 VREF+ 0.1uF AVDD 20 AVDD 14 AGND AGND Figure 5. Typical Application Circuitry CIS DC Coupled Non-Inverted Mode Rev. 3.00 DB7/LD ...
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XRD9827 Pixel N-1 CIS tckhw ADCCLK [5:0] DB [11:6] ADCCLK Mode 2. AC Coupled If the CIS signal has a black reference for the video signal, an external capacitor C EXT CLAMP (clamp) pin is set high an internal switch ...
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REXT CEXT CLAMP This value corresponds to the black reference of the image sensor. When the CLAMP pin is set back to low, the ADC samples the video signal with respect to the black reference. The typical ...
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XRD9827 VCC (5V - 15V) 19 100PF N/C 15 AVDD 20 14 AGND Figure 8. Typical Application Circuitry CIS AC Coupled Non-Inverted Rev. 3.00 9 DB7/LD RED 8 DB6/SDATA 7 DB5/SCLK 6 ...
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Pixel N-1 CIS tckpd tckhw ADCCLK [5:0] DB [11:6] tclpw CLAMP Figure 9. Timing Diagram for Figure 8 ADCCLK HI LO CLAMP HI LO Rev. 3.00 CIS Mode Timing -- AC Coupled (CLAMP enabled) Pixel N Pixel N+1 tap tap ...
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XRD9827 Internal CIS Reference Circuit ( The XRD9827 has an internal register reserved for interfacing to the Canon CIS model number CVA- 60216K. When this register is selected, the VDCEXT (Pin 16) becomes an output voltage of ...
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CIS Line-By-Line Rotating Gain and Offset (Configuration DB1 = 1, DB0 = 1) Line-by-line rotating gain and offset minimizes the amount of write cycles per scan. Pre-loaded values of gain and offset can be loaded for each color before the ...
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XRD9827 CIS Red Pixel Line Scan ADCCLK tsypw SYNCH tsa GAIN/ Red Gain/Offset Cycle OFFSET LD Reset Internal Mux Color to Red Channel (LD = 110YYYYYY11) Note Previous State CCD Configuration (Charge Coupled Device) Mode 1. AC Coupled ...
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XRD9827 AREA or RED LINEAR M N/C CCD U N/C X N/C Figure 13. CCD AC Coupled Application Area or Linear CCD Applications Figure block diagram for applications with Area or Linear CCDs (The timing for Area ...
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XRD9827 VCC (5V - 15V) 19 100PF 18 N N/C 16 N/C 15 AVDD 20 14 AGND Figure 14. Typical Application Circuitry Single Channel CCD AC Coupled Inverted Mode Rev. 3.00 9 RED DB7/LD 8 DB6/SDATA ...
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CCD Channel N ADCCLK CLAMP [5:0] DB [11:6] Figure 15. Timing Diagram for Figure 14 Triple Channel CCD Application Figure block diagram for pixel-by-pixel applica- tions with triple channel CCDs. During the optically shielded section of a ...
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XRD9827 XRD9827 RED/GRN/BLU N/C X Figure 16. CCD AC Coupled Application Rev. 3.00 VDD CLAMP RL 26 VRT VRB ...
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VCC (5V - 15V) 100PF 100PF 100PF N/C AVDD AGND Figure 17. Typical Application Circuitry Triple Channel CCD Rev. 3. RED DB7/LD 8 DB6/SDATA 7 DB5/SCLK 6 DB4 18 5 GRN DB3 4 DB2 3 ...
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XRD9827 PIXEL-BY-PIXEL 3 CHANNEL CCD -- AC Coupled RED N Pixel GRN N Pixel tclp=10ns BLU N Pixel TRACK CONVERT ADCCLK RED (N) RED (N) trars CLAMP tdv tdv RED (N-6) MSB DATA tsa tsypw SYNCH Figure 18. Timing Diagram ...
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V RT S1, S2 and S3 close when CLAMP is high and open when CLAMP is low From CCD RED Channel C EXT R From CCD GRN Channel C EXT G T/H From CCD BLU Channel C ...
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XRD9827 Mode 2. DC Coupled Typical CCDs have outputs with black references. Therefore, DC Coupled is not recommended for CCD applications. Offset Control DAC The offset DAC is controlled by 8 bits. The offset range is 800 mV ranging from ...
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Serial Load Control Registers The serial load registers are controlled by a three wire serial interface through the bi-directional parallel port to reduce the pin count of this device. When SYNCH is set to high, the output bus is tri-stated ...
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XRD9827 Output Bus Format ADC Output —> DO11(MSB):DO0(LSB) DB7 DB6 MSB DO11 DO10 LSB DO5 DO4 Table 8. 6 MSB + 6 LSB Output Bus Format DB7 DB6 MSB DO11 DO10 LSB DO3 DO2 Table 9. 8 MSB + 4 ...
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Control Registers Function (Register S2/S1/S0 Red Gain G5 G4 (000) (MSB) Red Offset O7 O6 (001) (MSB) Grn Gain G5 G4 (010) (MSB) Grn Offset (011 (MSB) Blu Gain (100 (MSB) Blu Offset (101) ...
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XRD9827 Rev. 3.00 34 ...
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LEAD SHRINK SMALL OUTLINE PACKAGE Seating Plane e SYMBOL MIN A 0.067 A1 0.002 A2 0.065 B 0.009 C 0.004 D 0.272 E 0.197 e 0.0256 BSC H 0.292 L 0.022 Note: The control dimension is ...
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... XRD9827 EXAR Corporation reserves the right to make changes to the products contained in this publication in order to improve design, performance or reliability. EXAR Corporation assumes no responsibility for the use of any circuits described herein, conveys no license under any patent or other right, and makes no representation that the circuits are free of patent infringement. Charts and schedules contained here in are only for illustration purposes and may vary depending upon a user’ ...