SRI512-SBN18/1GE STMicroelectronics, SRI512-SBN18/1GE Datasheet

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... Read_block and Write_block (32 bits) ■ Internal tuning capacitor ■ 1million erase/write cycles ■ 40-year data retention ■ Self-timed programming cycle ■ typical programming time July 2009 – Unsawn wafer – Bumped and sawn wafer Doc ID 13263 Rev 5 SRI512 1/47 www.st.com 1 ...

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... CRC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 4 Memory mapping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 4.1 Resettable OTP area . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 4.2 32-bit binary counters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 4.3 EEPROM area . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 4.4 System area . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 4.4.1 4.4.2 5 SRI512 operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 6 SRI512 states . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 6.1 Power-off state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 6.2 Ready state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 6.3 Inventory state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 6.4 Selected state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 6.5 Deselected state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 2/47 Character transmission format for request frame ...

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... Reset_to_inventory() command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 8.7 Read_block(Addr) command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 8.8 Write_block (Addr, Data) command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36 8.9 Get_UID() command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37 8.10 Power-on state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38 9 Maximum rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . and AC parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40 11 Part numbering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42 Appendix A ISO 14443 Type B CRC calculation . . . . . . . . . . . . . . . . . . . . . . . . . 43 Appendix B SRI512 command brief . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46 Doc ID 13263 Rev 5 Contents 3/47 ...

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... List of tables List of tables Table 1. Signal names . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Table 2. Bit description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Table 3. SRI512 memory mapping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Table 4. Standard anticollision sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 Table 5. Command code . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 Table 6. Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39 Table 7. Operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40 Table 8. DC characteristics Table 9. AC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40 Table 10. Ordering information scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42 Table 11. Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46 ...

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... Figure 31. Slot_marker frame exchange between reader and SRI512 . . . . . . . . . . . . . . . . . . . . . . . . 31 Figure 32. Select request format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 Figure 33. Select response format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 Figure 34. Select frame exchange between reader and SRI512 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 Figure 35. Completion request format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 Figure 36. Completion response format Figure 37. Completion frame exchange between reader and SRI512 . . . . . . . . . . . . . . . . . . . . . . . . . 33 Figure 38. ...

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... List of figures Figure 49. 64-bit unique identifier of the SRI512 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38 Figure 50. Get_UID frame exchange between reader and SRI512 . . . . . . . . . . . . . . . . . . . . . . . . . . . 38 Figure 51. SRI512 synchronous timing, transmit and receive . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41 Figure 52. Initiate frame exchange between reader and SRI512 . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44 Figure 53. Pcall16 frame exchange between reader and SRI512 . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44 Figure 54. ...

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... The SRI512 is a contactless memory, powered by an externally transmitted radio wave. It contains a 512-bit user EEPROM fabricated with STMicroelectronics CMOS technology. The memory is organized as 16 blocks of 32 bits. The SRI512 is accessed via the 13.56 MHz carrier. Incoming data are demodulated and decoded from the received amplitude shift keying (ASK) modulation signal and outgoing data are generated by load variation using bit phase shift keying (BPSK) coding of a 847 kHz subcarrier ...

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... Signal description The SRI512 contactless EEPROM can be randomly read and written in block mode (each block containing 32 bits). The instruction set includes the following nine commands: ● Read_block ● Write_block ● Initiate ● Pcall16 ● Slot_marker ● Select ● Completion ● Reset_to_inventory ● ...

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... These characters, framed by a start of frame (SOF) and an end of frame (EOF), are put together to form a command frame as shown in commands, addresses, data, a CRC and an EOF as defined in the ISO 14443-3 Type B Standard error is detected during data transfer, the SRI512 does not execute the command, but it does not generate an error frame. Figure 4. ...

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... ETUs at logic-0, ● followed by a single rising edge. Figure 6. Request end of frame b0 ETU 0 10/47 Description Figure 5 is composed of Figure 6 is composed of Doc ID 13263 Rev 5 Value The information byte is sent with the least significant bit first b10 SRI512 b11 1 ai07665 ai07666 ...

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... The character format is the same as for input data transfer frames are made SOF, data, a CRC and an EOF transfer error occurs, the reader does not issue an error code to the SRI512, but it should be able to detect it and manage the situation. The data transfer rate is 106 Kbits/second ...

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... MHz carrier frequency is modulated by the SRI512 at 847 kHz for a period 128/ƒ to allow the reader to synchronize. After the SRI512 forms the start bit (‘0’) of the answer SOF. After the falling edge of the answer EOF, the reader waits a minimum time, t SRI512. Figure 10. Example of a complete transmission frame Sent by the SOF ...

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... The two-byte CRC is present in every request and in every answer frame, before the EOF. The CRC is calculated on all the bytes between SOF (not included) and the CRC field. Upon reception of a request from a reader, the SRI512 verifies that the CRC value is valid invalid, the SRI512 discards the frame and does not answer the reader. ...

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... Memory mapping 4 Memory mapping The SRI512 is organized as 16 blocks of 32 bits as shown in accessible by the Read_block command. Depending on the write access, they can be updated by the Write_block command. A Write_block updates all the 32 bits of the block. Table 3. SRI512 memory mapping Msb Block Addr b 31 ...

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... The five 32-bit blocks making up the Resettable OTP area can be erased in one go by adding an auto-erase cycle to the Write_block command. An auto-erase cycle is added each time the SRI512 detects a Reload command. The Reload command is implemented through a specific update of the 32-bit binary counter located at block address 6 (see Section 4 ...

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... A protected counter block behaves like a ROM block. Figure 15. Binary counter (addresses MSb Block address b31 5 6 16/47 b31 1 ... ... ... (4096 million The SRI512 uses dedicated logic that only allows 32-bit block b16 b15 b14 32-bit binary counter 32-bit binary counter Doc ID 13263 Rev ...

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... The counter with block address 6 controls the Reload command used to reset the resettable OTP area (addresses 0 to 4). Bits b of these 11 bits is updated, the SRI512 detects the change and adds an Erase cycle to the Write_block command for locations (see Erase cycle remains active until a Power-off or a Select command is issued. The SRI512’s ...

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... These blocks can be accessed using the Section 4.4.1: OTP_Lock_Reg 32-bit block b16 b15 b14 User area User area User area User area User area User area User area User area User area Doc ID 13263 Rev 5 SRI512 for LSb Description Lockable EEPROM Ai12383b ...

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... The OTP_Lock_Reg bits cannot be erased. Once write-protected, the blocks behave like ROM blocks and cannot be unprotected. After any modification of the OTP_Lock_Reg bits necessary to send a Select command with a valid Chip_ID to the SRI512 in order to load the block write protection into the logic. 32-bit Block ...

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... Fixed Chip_ID (option) The SRI512 is provided with an anticollision feature based on a random 8-bit Chip_ID. Prior to selecting an SRI512, an anticollision sequence has to be run to search for the Chip_ID of the SRI512. This is a very flexible feature, however the searching loop requires time to run. For some applications, much time could be saved by knowing the value of the SRI512 Chip_ID beforehand, so that the SRI512 can be identified and selected directly without having to run an anticollision sequence ...

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... SRI512 (wrong command or CRC error), the memory does not return any error code. When a valid frame is received, the SRI512 may have to return data to the reader. In this case, data is returned using BPSK encoding, in the form of 10-bit characters framed by an SOF and an EOF ...

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... The SRI512 can be switched into different states. Depending on the current state of the SRI512, its logic will only answer to specific commands. These states are mainly used during the anticollision sequence, to identify and to access the SRI512 in a very short time. The SRI512 provides 6 different states, as described in the following paragraphs and in Figure 19 ...

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... Power-off Out of field Ready Chip_ID = RND 8bits Initiate() Out of field Inventory Out of field Select(Chip_ID) Reset_to_inventory() Select(Chip_ID) Selected ≠ Select( Chip_ID) Select(Chip_ID) Read_block() Write_block() Get_UID() Doc ID 13263 Rev 5 SRI512 states On field Initiate() or Pcall16() or Slot_marker(SN) or Select(wrong Chip_ID) Completion() Deactivated Out of field AI10794b 23/47 ...

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... SRI512. The purpose of the anticollision sequence is to allow the reader to select one SRI512 at a time. The SRI512 is given an 8-bit Chip_ID value used by the reader to select only one among up to 256 tags present within its field range. The Chip_ID is initialized with a random value during the Ready state, or after an Initiate() command in the Inventory state ...

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... SRI512 Figure 21. Description of a possible anticollision sequence 1. The value X in the answer Chip_ID means a random hexadecimal character from Doc ID 13263 Rev 5 Anticollision 25/47 ...

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... Table 4. Standard anticollision sequence Send Initiate(). – answer is detected step1. Step 1 Init: – If only 1 answer is detected, select and access the SRI512. After accessing the SRI512, deselect the tag and go to step1. – collision (many answers) is detected step2. Send Pcall16(). Step 2 Slot 0 – ...

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... SRI512 Figure 22. Example of an anticollision sequence Tag 1 Tag 2 Command Chip_ID Chip_ID 28h 75h READY State INITIATE () 40h 13h 45h 12h PCALL16() SELECT(30h) SLOT_MARKER(1) SLOT_MARKER(2) 12h SELECT(12h) 12h SLOT_MARKER(3) SLOT_MARKER(4) SLOT_MARKER(5) 45h SLOT_MARKER(6) SLOT_MARKER(N) SLOT_MARKER(F) 40h PCALL16() 40h SLOT_MARKER(1) SELECT(41h) SLOT_MARKER(2) SELECT(42h) ...

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... SRI512 commands 8 SRI512 commands See the paragraphs below for a detailed description of the Commands available on the SRI512. The commands and their hexadecimal codes are summarized in given in Appendix Table 5. Command code Hexadecimal Code 06h-00h 06h-04h x6h 08h 09h 0Bh 0Ch 0Eh 0Fh 28/47 B ...

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... Initiate() command, all SRI512 devices in Ready state switch to Inventory state, set a new 8- bit Chip_ID random value, and return their Chip_ID value. This command is useful when only one SRI512 in Ready state is present in the reader field range. It speeds up the Chip_ID search process. The Chip_slot_number is not used during Initiate() command access ...

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... If not, the SRI512 does not send any response. The Pcall16() command, used together with the Slot_marker() command, allows the reader to search for all the Chip_IDs when there are more than one SRI512 device in Inventory state present in the reader field range. ...

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... Chip_ID value. If not, the SRI512 does not send any response. The Slot_marker() command, used together with the Pcall16() command, allows the reader to search for all the Chip_IDs when there are more than one SRI512 device in Inventory state present in the reader field range. ...

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... Select(Chip_ID) command Command code = 0Eh The Select() command allows the SRI512 to enter the Selected state. Until this command is issued, the SRI512 will not accept any other command, except for Initiate(), Pcall16() and Slot_marker(). The Select() command returns the 8 bits of the Chip_ID value. An SRI512 in Selected state, that receives a Select() command with a Chip_ID that does not match its own is automatically switched to Deselected state ...

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... On receiving the Completion() command, an SRI512 in Selected state switches to Deactivated state and stops decoding any new commands. The SRI512 is then locked in this state until a complete reset (tag out of the field range). A new SRI512 can thus be accessed through a Select() command without having to remove the previous one from the field ...

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... On receiving the Reset_to_inventory() command, all SRI512 devices in Selected state revert to Inventory state. The concerned SRI512 devices are thus resubmitted to the anticollision sequence. This command is useful when two SRI512 devices with the same 8- bit Chip_ID happen Selected state at the same time. Forcing them to go through the anticollision sequence again allows the reader to generates new Pcall16() commands and so, to set new random Chip_IDs ...

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... Data bytes are transmitted with the Least Significant byte first and each byte is transmitted with the least significant bit first. The address byte gives access to the 16 blocks of the SRI512 (addresses 0 to 15). Read_block commands issued with a block address above 15 will not be interpreted and the SRI512 will not return any response, except for the System area located at address 255 ...

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... Data bytes are transmitted with the least significant byte first, and each byte is transmitted with the least significant bit first. The address byte gives access to the 16 blocks of the SRI512 (addresses 0 to 15). Write_block commands issued with a block address above 15 will not be interpreted and the SRI512 will not return any response, except for the System area located at address 255 ...

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... Get_UID() command Command code = 0Bh On receiving the Get_UID command, the SRI512 returns its 8 UID bytes. UID bytes are transmitted with the least significant byte first, and each byte is transmitted with the least significant bit first. The SRI512 must have received a Select() command and be switched to Selected state before any Get_UID() command can be accepted ...

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... SRI512 commands Unique Identifier (UID) Members of the SRI512 family are uniquely identified by a 64-bit Unique Identifier (UID). This is used for addressing each SRI512 device uniquely after the anticollision loop. The UID complies with ISO/IEC 15963 and ISO/IEC 7816- read-only code, and comprises (as summarized in ● ...

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... SRI512 9 Maximum rating Stressing the device above the rating listed in the absolute maximum ratings table may cause permanent damage to the device. These are stress ratings only and operation of the device at these or any other conditions above those indicated in the operating sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability ...

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... Condition ISO 10373-6 13.56 MHz (1) Parameter Condition MI=(A-B)/(A+B) ETU = 128/f Coupler to SRI512 Coupler to SRI512 SRI512 to coupler With no auto-erase cycle With auto-erase cycle (EEPROM) Binary counter decrement Doc ID 13263 Rev 5 Min. Max. –20 85 Min Typ Max 2.5 3.5 100 250 ...

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... SRI512 Figure 51. SRI512 synchronous timing, transmit and receive ASK Modulated signal from the Reader to the Contactless device FRAME Transmission between the reader and the contactless device FRAME Transmitted by the SRI512 in BPSK Data jitter on FRAME Transmitted by the reader in ASK t RFF RFSBL t MIN CD ...

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... Devices are shipped from the factory with the memory content bits erased to 1. For a list of available options (speed, package, etc.) or for further information on any aspect of this device, please contact your nearest ST sales office. 42/47 SRI512 Doc ID 13263 Rev 5 SRI512 – 1GE ...

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... SRI512 Appendix A ISO 14443 Type B CRC calculation #include <stdio.h> #include <stdlib.h> #include <string.h> #include <ctype.h> #define BYTE unsigned char #define USHORT unsigned short unsigned short UpdateCrc(BYTE ch, USHORT *lpwCrc (ch^(BYTE)((*lpwCrc) & 0x00FF)); ch = (ch^(ch<<4)); *lpwCrc = (*lpwCrc >> 8)^((USHORT)ch << 8)^((USHORT)ch<<3)^((USHORT)ch>>4); ...

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... Figure 53. Pcall16 frame exchange between reader and SRI512 Reader SOF 06h SRI512 Figure 54. Slot_marker frame exchange between reader and SRI512 Reader SOF SRI512 Figure 55. Select frame exchange between reader and SRI512 Reader SOF 0Eh SRI512 Figure 56. Completion frame exchange between reader and SRI512 Reader SOF SRI512 ...

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... SRI512 Figure 57. Reset_to_inventory frame exchange between reader and SRI512 Reader SOF SRI512 Figure 58. Read_block frame exchange between reader and SRI512 Reader SOF 08h Address SRI512 Figure 59. Write_block frame exchange between reader and SRI512 Reader SOF 09h SRI512 Figure 60. Get_UID frame exchange between reader and SRI512 ...

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... TUN 3 DC characteristics. Small text changes. All antennas are ECOPACK® compliant. SRI512 products are no longer delivered with A3, A4 and A5 4 antennas. Table 6: Absolute maximum ratings Ordering information scheme 5 Initial counter values corrected in ...

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... SRI512 Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST’s terms and conditions of sale. ...