SL3S1002FTB1,115 NXP Semiconductors, SL3S1002FTB1,115 Datasheet

no-image

SL3S1002FTB1,115

Manufacturer Part Number
SL3S1002FTB1,115
Description
IC UCODE G2XM FTB1 SOT1122
Manufacturer
NXP Semiconductors
Datasheet

Specifications of SL3S1002FTB1,115

Rf Type
Read / Write
Frequency
865MHz ~ 928MHz
Features
ISO 18000-6C
Package / Case
3-XSON, SOT1122
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
935290254115

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
SL3S1002FTB1,115
Manufacturer:
NXP/恩智浦
Quantity:
20 000
1. General description
The UHF EPCglobal Generation 2 standard allows the commercialized provision of mass
adoption of UHF RFID technology for passive smart tags and labels. Main fields of
applications are supply chain management and logistics for worldwide use with special
consideration of European, US and Chinese frequencies to ensure that operating
distances of several meters can be realized.
The G2X is a dedicated chip for passive, intelligent tags and labels supporting the
EPCglobal Class 1 Generation 2 UHF RFID standard. It is especially suited for
applications where operating distances of several meters and high anti-collision rates are
required.
The G2X is a product out of the NXP Semiconductors UCODE product family. The entire
UCODE product family offers anti-collision and collision arbitration functionality. This
allows a reader to simultaneously operate multiple labels/tags within its antenna field.
A UCODE G2X based label/ tag requires no external power supply.
Its contact-less interface generates the power supply via the antenna circuit by
propagative energy transmission from the interrogator (reader), while the system clock is
generated by an on-chip oscillator. Data transmitted from interrogator to label/tag is
demodulated by the interface, and it also modulates the interrogator’s electromagnetic
field for data transmission from label/tag to interrogator. A label/tag can be operated
without the need for line of sight or battery, as long as it is connected to a dedicated
antenna for the targeted frequency range. When the label/tag is within the interrogator’s
operating range, the high-speed wireless interface allows data transmission in both
directions.
In addition to the EPC specifications the G2X offers an integrated EAS (Electronic Article
Surveillance) feature and read protection of the memory content. On top of the
specification of the G2XL the G2XM offers 512-bit of user memory.
SL3ICS1002/1202
UCODE G2XM and G2XL
Rev. 3.5 — 2 November 2009
157335
Product short data sheet
CONFIDENTIAL

Related parts for SL3S1002FTB1,115

SL3S1002FTB1,115 Summary of contents

Page 1

... The G2X is a product out of the NXP Semiconductors UCODE product family. The entire UCODE product family offers anti-collision and collision arbitration functionality. This allows a reader to simultaneously operate multiple labels/tags within its antenna field. ...

Page 2

... NXP Semiconductors 1.1 Air interface standards The G2X is certified according EPCglobal 1.0.9 and fully supports all parts of the "Specification for RFID Air Interface EPCglobal, EPCTM Radio-Frequency Identity Protocols, Class-1 Generation-2 UHF RFID, Protocol for Communications at 860 MHz - 960 MHz, Version 1.1.0". ...

Page 3

... NXP Semiconductors 2. Features 2.1 Key features 512-bit user memory (G2XM only) 240-bit of EPC memory 64-bit tag identifier (TID) including 32-bit unique serial number Memory read protection EAS (Electronic Article Surveillance) command Calibrate command 32-bit kill password to permanently disable the tag 32-bit access password to allow a transition into the secured transmission state ...

Page 4

... NXP Semiconductors 3. Applications Supply chain management Item level tagging Asset management Container identification Pallet and case tracking Product authentication 4. Ordering information Table 1. Type number SL3ICS1002FUG/V7AF SL3S1002FTT SL3S1002FTB1 SL3S1002AC0 SL3S1002AC2 Table 2. Type number SL3ICS1202FUG/V7AF SL3S1202FTT SL3S1202FTB1 SL3S1202AC0 SL3S1202AC2 [1] FCS2 Polymer Strap, JEDEC outline standard Copper ...

Page 5

... NXP Semiconductors 5. Block diagram The SL3ICS1002/1202 IC consists of three major blocks: - Analog RF Interface - Digital Controller - EEPROM The analog part provides stable supply voltage and demodulates data received from the reader for being processed by the digital part. Further, the modulation transistor of the analog part transmits data back to the reader. ...

Page 6

... NXP Semiconductors 6. Wafer layout and pinning information 6.1 Wafer layout (1) X-scribe line width: 56.4 μm (2) Y-scribe line width: 56.4 μm (3) Chip step, x-length: 488.0 μm (4) Chip step, y-length: 470,0 μm (5) Bump to bump distance X (TP1 - RFN): 351,0 μm (6) Bump to bump distance Y (RFN - RFP): 333,0 μm (7) Distance bump to metal sealring X: 40,3 μ ...

Page 7

... NXP Semiconductors 6.2 FCS2 layout strap and pinning Fig 3. Pinning - SOT1040-1 Table 3. Symbol LA LB 157335 Product short data sheet CONFIDENTIAL Pin description of SOT1040-1 Pin Description Antenna Connection 1 Antenna Connection 2 Rev. 3.5 — 2 November 2009 157335 SL3ICS1002/1202 UCODE G2XM and G2XL © NXP B.V. 2009. All rights reserved. ...

Page 8

... NXP Semiconductors 7. Package outline TSSOP8: plastic thin shrink small outline package; 8 leads; body width 3 mm DIMENSIONS (mm are the original dimensions) UNIT mm Notes 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic or metal protrusions of 0.25 mm maximum per side are not included. ...

Page 9

... NXP Semiconductors XSON3: plastic extremely thin small outline package; no leads; 3 terminals; body 1 x 1. 4× (2) type code Dimensions (1) Unit max 0.50 0.04 0.45 0.55 mm nom 0.40 0.50 min 0.37 0.47 Notes 1. Dimension A is including plating thickness. 2. Can be visible in some manufacturing processes. ...

Page 10

... NXP Semiconductors Table 5. Symbol RFP RFN n.c. Table 6. Type SL3S1202FTB1 SL3S1002FTB1 157335 Product short data sheet CONFIDENTIAL Pin description of SOT1122 Pin Description 1 Ungrouded antenna connector 2 Grounded antenna connector 3 not connected SOT1122 Marking Type code (Marking Rev. 3.5 — 2 November 2009 157335 ...

Page 11

... NXP Semiconductors Package FCS2, SOT1040AA1, 12 μm Cu metallization Fig 6. 157335 Product short data sheet CONFIDENTIAL SL3ICS1002/1202 Rev. 3.5 — 2 November 2009 157335 UCODE G2XM and G2XL © NXP B.V. 2009. All rights reserved ...

Page 12

... NXP Semiconductors Package FCS2, SOT1040AB2, 20 μm Al metallization Fig 7. 157335 Product short data sheet CONFIDENTIAL SL3ICS1002/1202 Rev. 3.5 — 2 November 2009 157335 UCODE G2XM and G2XL © NXP B.V. 2009. All rights reserved ...

Page 13

... NXP Semiconductors Fig 8. Splicing drawing SOT1040-1 157335 Product short data sheet CONFIDENTIAL SL3ICS1002/1202 Rev. 3.5 — 2 November 2009 157335 UCODE G2XM and G2XL © NXP B.V. 2009. All rights reserved ...

Page 14

... NXP Semiconductors 8. Limiting values Table 7. In accordance with the Absolute Maximum Rating System (IEC 60134) Voltages are referenced to RFN Symbol Die T stg T oper V ESD TSSOP8, SOT1122 T stg P tot T oper V ESD SOT1040AA1, SOT1040AB2 T oper r.h. stg T stg V ESD [1] Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device ...

Page 15

... NXP Semiconductors 9. Characteristics 9.1 Wafer characteristics Table 8. Wafer characteristics Symbol Parameter Memory characteristics t EEPROM data retention RET N EEPROM write endurance WE Interface characteristics P total power dissipation tot f operating frequency oper P minimum operating power supply min C input capacitance (parallel quality factor ( chip Z impedance (915 MHz) modulated jammer suppression ≥ ...

Page 16

... NXP Semiconductors 10. G2X Memory According EPCglobal the chip memory is organized in following memory sections: Table 10. Name Reserved memory (32 bit ACCESS and 32 bit KILL password) EPC (excluding 16 bit CRC-16 and 16 bit PC) TID (including unique 32 bit serial number) User memory (G2XM only) The logical address of all memory banks begin at zero (00h). ...

Page 17

... TID [3] Bank 11 00h – 1FFh User [1] This is the initial memory content when delivered by NXP Semiconductors [2] G2XL: HEX 3005 FB63 AC1F 3841 EC88 0467 G2XM: HEX 3005 FB63 AC1F 3681 EC88 0468 [3] only G2XM 10.1.1 User memory (only G2XM) The User Memory bank contains a sequential block of 512 bits (32 words of 16 bit) ranging from address 00h to 1Fh ...

Page 18

... NXP Semiconductors 11. Revision history Table 12. Revision history Document ID Release date 157335 20091102 • Modifications: Type SOT1122 added • Figure 2 “Wafer layout and pinning 157334 20090805 • Modifications: Table 8 “Wafer • Table 7 “TSSOP8 characteristics” characteristics” removed 157333 20090617 • Modifications: New type FCS2 Aluminum, SOT1040AB2 added • ...

Page 19

... Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice ...

Page 20

... NXP Semiconductors 14. Tables Table 1. Ordering information G2XM . . . . . . . . . . . . . . . .4 Table 2. Ordering information G2XL Table 3. Pin description of SOT1040 Table 4. Pin description of TSSOP8 . . . . . . . . . . . . . . . . .8 Table 5. Pin description of SOT1122 . . . . . . . . . . . . . . .10 Table 6. SOT1122 Marking .10 15. Figures Fig 1. Block diagram of G2X Fig 2. Wafer layout and pinning information . . . . . . . . . .6 Fig 3. Pinning - SOT1040 Fig 4 ...

Page 21

... NXP Semiconductors 16. Contents 1 General description . . . . . . . . . . . . . . . . . . . . . . 1 1.1 Air interface standards . . . . . . . . . . . . . . . . . . . 2 2 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2.1 Key features . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2.2 Key benefits . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2.3 Custom commands Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 4 Ordering information . . . . . . . . . . . . . . . . . . . . . 4 5 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . 5 6 Wafer layout and pinning information . . . . . . . 6 6.1 Wafer layout . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 6.2 FCS2 layout strap and pinning . . . . . . . . . . . . . 7 7 Package outline ...

Related keywords