SI4712-B30-GM Silicon Laboratories Inc, SI4712-B30-GM Datasheet

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SI4712-B30-GM

Manufacturer Part Number
SI4712-B30-GM
Description
IC TX FM RADIO W/RPS 20UQFN
Manufacturer
Silicon Laboratories Inc
Datasheet

Specifications of SI4712-B30-GM

Frequency
76MHz ~ 108MHz
Applications
General Purpose
Modulation Or Protocol
FM
Current - Transmitting
18.8mA
Data Interface
PCB, Surface Mount
Antenna Connector
PCB, Surface Mount
Voltage - Supply
2.7 V ~ 5.5 V
Operating Temperature
-20°C ~ 85°C
Package / Case
20-UQFN, 20-µQFN
Operating Supply Voltage (typ)
3.3/5V
Operating Supply Voltage (min)
2.7V
Operating Supply Voltage (max)
5.5V
Operating Temp Range
-20C to 85C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
20
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
Power - Output
-
Memory Size
-
Data Rate - Maximum
-
Lead Free Status / Rohs Status
Supplier Unconfirmed

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
SI4712-B30-GMR
Manufacturer:
SILICON LABS/芯科
Quantity:
20 000
Part Number:
SI4712-B30-GMR
0
F M R
Features
Applications
Description
The Si4712/13-B30 integrates the complete transmit functions for
standards-compliant unlicensed FM broadcast stereo transmission. The
chip also allows integrated receive power scanning to identify low signal
power FM channels. Users must comply with local regulations on radio
frequency (RF) transmission.
Functional Block Diagram
Rev. 1.1 2/08
Ant
Tx
120 nH
Integrated receive power
measurement
Worldwide FM band support
(76–108 MHz)
Requires only two external
components
Frequency synthesizer with
integrated VCO
Digital stereo modulator
Programmable pre-emphasis
Analog/digital audio interface
Audio silence detector
Programmable reference clock
Cellular handsets/hands-free
MP3 players
Portable media players
L1
RFGND
TXO
A D I O
AFC
T
R A N S M I T T E R WITH
DETECT
PEAK
INTERFACE
DAC
DAC
CONTROL
Copyright © 2008 by Silicon Laboratories
DSP
Wireless speakers/microphone
Satellite digital audio radios
Personal computers/notebooks
RDS/RBDS encoder (Si4713 only)
PCB loop and stub antenna
support with self-calibrated
capacitor tuning
Programmable transmit level
Audio dynamic range control
Advanced modulation control
2.7 to 5.5 V supply voltage
Integrated LDO regulator
3 x 3 x 0.55 mm 20-pin QFN
Designed for compatibility with
cellular operation
RDS (Si4713)
Pb-free and RoHS Compliant
GPO
DIGITAL
AUDIO
ADC
ADC
Si4712/13
LDO
R
EC E I V E
DFS
DIN
LIN
RIN
VDD
GND
22 nF
C1
2.7–5.5 V
S i 4 7 1 2 / 1 3 - B 3 0
P
O WE R
Patents pending
Note: To ensure proper operation and
RFGND
TXO
RST
NC
NC
performance, follow the guide-
lines
Antenna Selection and Layout
Guidelines.” Silicon Laboratories
will evaluate schematics and lay-
outs for qualified customers.
Ordering Information:
S
2
3
4
5
Pin Assignments
1
6
Si4712/13-B30
See page 34.
CAN
20
7
(Top View)
in
19
8
GND
PAD
“AN383:
18
9
17
10
Si4712/13-B30
16
11
15 RIN
14
13
12
Universal
DFS
DIN
GND
VDD

Related parts for SI4712-B30-GM

SI4712-B30-GM Summary of contents

Page 1

... Cellular handsets/hands-free MP3 players Portable media players Description The Si4712/13-B30 integrates the complete transmit functions for standards-compliant unlicensed FM broadcast stereo transmission. The chip also allows integrated receive power scanning to identify low signal power FM channels. Users must comply with local regulations on radio frequency (RF) transmission ...

Page 2

... Si4712/13-B30 2 Rev. 1.1 ...

Page 3

... Pin Descriptions: Si4712/13- Ordering Guide . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 9. Package Markings (Top Marks 9.1. Si4712 Top Mark . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 9.2. Si4713 Top Mark . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 9.3. Top Mark Explanation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 10. Package Outline: Si4712/13- 11. PCB Land Pattern: Si4712/13- .37 12. Additional Reference Resources . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39 Document Change List . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .40 Contact Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .42 Si4712/13-B30 Rev. 1.1 Page ...

Page 4

... Exposure beyond recommended operating conditions for extended periods may affect device reliability. 2. The Si4712/13 devices are high-performance RF integrated circuits with certain pins having an ESD rating of < HBM. Handling and assembly of these devices should only be done at ESD-protected workstations. ...

Page 5

... SCLK, RCLK inactive IO Powerdown mode 3 3 500 µA OH OUT –500 µA OL OUT Rev. 1.1 Si4712/13-B30 = 76–108 MHz. RF Min Typ Max — 18.8 22.8 — 320 600 — 18.3 — — 320 — — 16.8 — — 320 — — — 0.7 x — + 0.3 ...

Page 6

... Si4712/13-B30 Table 4. Reset Timing Characteristics (V = 2 1 Parameter RST Pulse Width and GPO1, GPO2/INT Setup to RST↑ GPO1, GPO2/INT Hold from RST↑ Important Notes: 1. When selecting 2-wire mode, the user must ensure that a 2-wire start condition (falling edge of SDIO while SCLK is high) does not occur within 300 ns before the rising edge of RST ...

Page 7

... RST. 3. When selecting 2-wire mode, the user must ensure that SCLK is high during the rising edge of RST, and stays high until after the first start condition. 4. The Si4712/13 delays SDIO by a minimum of 300 ns from the V t specification. ...

Page 8

... Si4712/13-B30 SU:STA HD:STA LOW 70% SCLK 30% 70% SDIO 30% START t r:IN Figure 2. 2-Wire Control Interface Read and Write Timing Parameters SCLK A6-A0, SDIO R/W START ADDRESS + R/W Figure 3. 2-Wire Control Interface Read and Write Timing Diagram HIGH t r:IN f: HD:DAT SU:DAT D7-D0 ACK DATA ACK Rev ...

Page 9

... HSDIO HIGH LOW t S A6-A5, R/W, A0 D15 A4-A1 Address HSDIO CDV t S A6-A5, R/W, A0 D15 A4-A1 Address In ½ Cycle Bus Turnaround Rev. 1.1 Si4712/13-B30 Min Typ Max Unit 0 — 2.5 MHz 25 — — — — — — — — — — ...

Page 10

... Si4712/13-B30 Table 7. SPI Control Interface Characteristics (V = 2 1 Parameter SCLK Frequency SCLK High Time SCLK Low Time SDIO Input, SEN to SCLK↑ Setup SDIO Input to SCLK↑ Hold ↓ SEN Input to SCLK Hold ↓ SCLK to SDIO Output Valid ↓ ...

Page 11

... DIN Figure 8. Digital Audio Interface Timing Parameters – °C) A Symbol Test Condition t DCH t DCL t SU:DFS t HD:DFS t SU:DIN t HD:DIN SU:DFS t SU:DIN Rev. 1.1 Si4712/13-B30 Min Typ Max Unit 10 — — — — — — — — — — — — ns — — ...

Page 12

... Si4712/13-B30 Table 9. FM Transmitter Characteristics = 118 dBµV, stereo, Δf = 68.25 kHz, Δfpilot = 6.75 kHz, REFCLK = 32.768 kHz, 75 µs pre-emphasis, (Test conditions unless otherwise specified. Production test conditions 3 Characterization test conditions 2 All minimum and maximum specifications are guaranteed and apply across the recommended operating conditions. ...

Page 13

... Input Capacitance Received Noise Level Accuracy 2 (Si4712/13 Only) Notes transmitter performance specifications are subject to adherence to Silicon Laboratories guidelines in “AN383: Universal Antenna Selection and Layout Guidelines.” Silicon Laboratories will evaluate schematics and layouts for qualified customers. Tested with test schematic (L = 120 nH, Q > 30) shown in Figure 9 on page 15. ...

Page 14

... Si4712/13-B30 Table 10. FM Receive Power Scan Characteristics (V = 2 1 Parameter Tune and Signal Strength Measurement Time per Channel Notes: 1. Settling time for ac coupling capacitors on the audio input pins after Receive to Transmit transition can take a few hundred milliseconds. The actual settling time depends on the values of the ac-coupling capacitors. Using digital audio input mode avoids this settling time ...

Page 15

... QFN Universal Layout Guide.” Silicon Laboratories will evaluate schematics and layouts for qualified customers. 4. LIN, RIN line inputs must be ac-coupled. 2.2. Test Circuit Bill of Materials Table 12. Si4712/13 Test Circuit Bill of Materials Component(s) C1 Supply bypass capacitor, 22 nF, 20%, Z5U/X7R C2 Coupling Capacitor, 0.47 µ ...

Page 16

... V IO 1.5 to 3.6 V Notes: 1. Si4712/13 is shown configured GPO2/INT can be configured for interrupts with the powerup command ensure proper operation and FM transmitter performance, follow the guidelines in “AN383 QFN Universal Layout Guide.” Silicon Laboratories will evaluate schematics and layouts for qualified customers. ...

Page 17

... V IO 1.5 to 3.6 V Notes: 1. Si4712/13 is shown configured GPO2/INT can be configured for interrupts with the powerup command ensure proper operation and FM transmitter performance, follow the guidelines in “AN383: Si47xx QFN Universal Layout Guide.” Silicon Laboratories will evaluate schematics and layouts for qualified customers. ...

Page 18

... Si4712/13-B30 4. Universal AM/FM RX/FM TX Application Schematic Figure 12 shows an application schematic that supports the Si47xx family QFN products, including the Si4702/3/4/5 FM receivers, Si471x FM transmitters, Si472x FM transceivers, and Si473x AM/FM receivers Right Audio T 5 Left Audio Jack C4 L HEADPHONE 1 nF 270 nH System Component ...

Page 19

... Current limiting resistor, 2 kΩ, 0402 Current limiting resistor, 600 Ω, 0402 R18 L1 VCO filter inductor, 10 nH, 0603, Q>30, Murata, LQW18ANR01J00D C17 VCO filter capacitor, 3.3 pF, 0402, COG, Venkel, C0402COG2503R3JN Si4712/13-B30 Description Rev. 1.1 Note R12, R13, and R21 for Si4702/03 Only AM Ferrite Antenna AM Ferrite Antenna ...

Page 20

... L1 120 nH RFGND AFC Figure 13. Functional Block Diagram The Si4712/13 is the first 100% CMOS FM radio transmitter with integrated receive functionality to measure received signal strength. The device leverages Silicon Labs’ highly successful and proven Si4700/01 FM receiver patent family and offers unmatched integration and performance, allowing FM transmit to be added to any portable device with a single chip ...

Page 21

... These features can dramatically improve the end user’s listening experience. The Si4712/13 is reset by applying a logic low on the RST pin. This causes all register values to be reset to their default values. The digital input/output interface ...

Page 22

... C 0 RDS deviations of 2.0 kHz for a total peak frequency deviation of 77 kHz. The total peak transmit frequency deviation of the Si4712/13 can range from 0 to 100 kHz C 1 and is equal to the arithmetic sum of the Transmit 19 kHz Audio, Pilot, and RDS deviations. Users must comply ...

Page 23

... DCLK cycles after the LSB of each word before the next DFS transition and MSB of the next word. The number of audio bits can be configured for 8, 16, 20 bits. Si4712/13-B30 5.4.2. Audio Sample Rates The device supports a number of industry-standard sampling rates including 32, 40, 44.1, and 48 kHz. The ...

Page 24

... Si4712/13-B30 INVERTED (IFALL = 1) DCLK (IFALL = 0) DCLK DFS I2S (IMODE = 0000) 1 DCLK DIN/DOUT 1 2 MSB INVERTED (IFALL = 1) DCLK (IFALL = 0) DCLK DFS Left-Justified (IMODE = 0110) DIN/DOUT 1 2 MSB Figure 16. Left-Justified Digital Audio Format (IFALL = 0) DCLK DFS DIN/DOUT 1 (IMODE = 1100) st (MSB at 1 rising edge) ...

Page 25

... Line Input The Si4712/13 provides left and right channel line inputs (LIN and RIN). The inputs are high-impedance and low- capacitance, suited to receiving line level signals from external audio baseband processors. Both line inputs are low-noise inputs with programmable attenuation. ...

Page 26

... Si4712/13-B30 5.6. Audio Dynamic Range Control The Si4712/13 includes digital audio dynamic range control with programmable gain, threshold, attack rate, and release rate. The total dynamic range reduction is set by the gain value and the audio output compression above the threshold is Threshold/(Gain + Threshold) in dB. The gain specified cannot be larger than the absolute value of the threshold ...

Page 27

... Si4712/13 and receive responses from the device. The serial port can operate in three bus modes: 2-wire mode, SPI mode, or 3-wire mode. The Si4712/13 selects the bus mode by sampling the state of the GPO1 and GPO2/INT pins on the rising edge of RST. The GPO1 ...

Page 28

... SDIO or Si4712/13 has GPO1. The Si4712/13 changes the state of SDIO or GPO1 after the falling edges of SCLK. Data should be captured by the user on the rising edges of SCLK. After the status byte has been read, the user raises SEN after the last falling edge of SCLK to end the transaction ...

Page 29

... SCLK. For read operations, the control word is followed by a delay of one-half SCLK cycle for bus turnaround. Next, the Si4712/13 drives the 16-bit read data word serially on SDIO, changing the state of SDIO on each rising edge of SCLK. A transaction ends when the user sets SEN high, then pulses SCLK high and low one final time ...

Page 30

... Si4712/13-B30 6. Commands and Properties Table 17. Si471x Command Summary Cmd Name 0x01 POWER_UP 0x10 GET_REV 0x11 POWER_DOWN 0x12 SET_PROPERTY 0x13 GET_PROPERTY 0x14 GET_INT_STATUS 0x15 PATCH_ARGS 0x16 PATCH_DATA 0x30 TX_TUNE_FREQ 0x31 TX_TUNE_POWER 0x32 TX_TUNE_MEASURE 0x33 TX_TUNE_STATUS 0x34 TX_ASQ_STATUS 0x35 TX_RDS_BUFF 0x36 TX_RDS_PS 0x80 ...

Page 31

... TX_ACOMP_GAIN 0x2205 TX_LIMITER_RELEASE_TIME 0x2300 TX_ASQ_INTERRUPT_SOURCE 0x2301 TX_ASQ_LEVEL_LOW Si4712/13-B30 Description Enables interrupt sources. Configures the digital input format. Configures the digital input sample rate steps. Default is 0. Sets frequency of the reference clock in Hz. The range is 31130 to 34406 Hz disable the AFC. Default is 32768 Hz ...

Page 32

... Si4712/13-B30 Table 18. Si471x Property Summary (Continued) Prop Name 0x2302 TX_ASQ_DURATION_LOW 0x2303 TX_ASQ_LEVEL_HIGH 0x2304 TX_ASQ_DURATION_HIGH 0x2C00 TX_RDS_INTERRUPT_SOURCE 0x2C01 TX_RDS_PI 0x2C02 TX_RDS_PS_MIX 0x2C03 TX_RDS_PS_MISC 0x2C04 TX_RDS_PS_REPEAT_COUNT 0x2C05 TX_RDS_PS_MESSAGE_COUNT Si4713 Only. Number of PS messages in use. 0x2C06 TX_RDS_PS_AF 0x2C07 TX_RDS_FIFO_SIZE 32 Description Configures the duration which the input audio level must be below the low threshold in order to detect a low audio condition ...

Page 33

... Pin Descriptions: Si4712/13-GM RFGND Pin Number(s) Name RFGND 4 TXO 5 RST 6 SEN 7 SCLK 8 SDIO 9 RCLK DIN 14 DFS 15 RIN 16 LIN 17 GPO3/DCLK 18 GPO2/INT 19 GPO1 12, GND PAD GND RIN 3 GND 14 DFS PAD TXO 4 13 DIN RST 5 12 GND 6 11 VDD Description No connect. Leave floating. RF ground. Connect to ground plane on PCB. ...

Page 34

... Si4712/13-B30 8. Ordering Guide Part Number* Si4712-B30-GM Portable broadcast FM transmitter with receive power scan Si4713-B30-GM Portable broadcast FM transmitter with receive power scan and RDS/RBDS encoder *Note: Add an “(R)” at the end of the device part number to denote tape and reel option; 2500 quantity per reel. ...

Page 35

... Line 2 Marking Die Revision TTT = Internal Code Line 3 Marking: Circle = 0.5 mm Diameter (Bottom-Left Justified Year WW = Workweek Figure 20. Si4712 Top Mark Figure 21. Si4713 Top Mark 12 = Si4712 13 = Si4713 30 = Firmware Revision Revision B Die Internal tracking code. Pin 1 Identifier Assigned by the Assembly House. Corresponds to the last sig- nificant digit of the year and workweek of the mold date ...

Page 36

... Si4712/13-B30 10. Package Outline: Si4712/13-GM Figure 22 illustrates the package details for the Si4712/13. Table 19 lists the values for the dimensions shown in the illustration. Figure 22. 20-Pin Quad Flat No-Lead (QFN) Symbol Millimeters Min Nom A 0.50 0.55 A1 0.00 0.02 b 0.20 0.25 c 0.27 0.32 D 3.00 BSC D2 1 ...

Page 37

... PCB Land Pattern: Si4712/13-GM Figure 23 illustrates the PCB land pattern details for the Si4712/13-GM. Table 20 lists the values for the dimensions shown in the illustration. Figure 23. PCB Land Pattern Rev. 1.1 Si4712/13-B30 37 ...

Page 38

... Si4712/13-B30 Table 20. PCB Land Pattern Dimensions Symbol Millimeters Min 2.10 Notes: General 1. All dimensions shown are in millimeters (mm) unless otherwise noted. 2. Dimensioning and tolerancing is per the ANSI Y14.5M-1994 specification. 3. This land pattern design is based on IPC-SM-782 guidelines. 4. All dimensions shown are at Maximum Material Condition (MMC). Least Material Condition (LMC) is calculated based on a fabrication allowance of 0 ...

Page 39

... Additional Reference Resources Si47xx Evaluation Board User’s Guide AN307: Si4712/13/20/21 Receive Power Scan AN309: Si4710/11/12/13 Evaluation Board Quick- Start Guide AN332: Universal Programming Guide AN383: Universal Antenna Selection and Layout Guidelines AN388: Universal Evaluation Board Test Procedure Si4710/11/12/13 Customer Support Site: http://www ...

Page 40

... Si4712/13-B30 OCUMENT HANGE IST Revision 0.5 to Revision 0.9 Updated Table 3 on page 5. Updated Table 8 on page 11. Updated Table 9 on page 12. Updated Table 17 on page 30. Updated Table 18 on page 31. Added "9. Package Markings (Top Marks)" on page 35. Revision 0.9 to Revision 1.0 Updated Table 3 on page 5. ...

Page 41

... N : OTES Si4712/13-B30 Rev. 1.1 41 ...

Page 42

... Si4712/13-B30 C I ONTACT NFORMATION Silicon Laboratories Inc. 400 West Cesar Chavez Austin, TX 78701 Tel: 1+(512) 416-8500 Fax: 1+(512) 416-9669 Toll Free: 1+(877) 444-3032 Email: FMinfo@silabs.com Internet: www.silabs.com The information in this document is believed to be accurate in all respects at the time of publication but is subject to change without notice. ...

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