SI4020-I1-FT Silicon Laboratories Inc, SI4020-I1-FT Datasheet

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SI4020-I1-FT

Manufacturer Part Number
SI4020-I1-FT
Description
IC TX FSK 915MHZ 5.4V 16-TSSOP
Manufacturer
Silicon Laboratories Inc
Datasheet

Specifications of SI4020-I1-FT

Package / Case
16-TSSOP
Frequency
315MHz, 433MHz, 868MHz, and 915MHz
Modulation Or Protocol
FSK, OOK
Data Rate - Maximum
256 kbps
Current - Transmitting
14mA
Data Interface
PCB, Surface Mount
Antenna Connector
PCB, Surface Mount
Voltage - Supply
2.2 V ~ 5.4 V
Operating Temperature
-40°C ~ 85°C
Operating Frequency
315 MHz to 915 MHz
Mounting Style
SMD/SMT
Operating Supply Voltage
2.2 V to 5.4 V
Supply Current
1.5 mA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
Power - Output
-
Applications
-
Memory Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
336-1621-5

Available stocks

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SILICON
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Si4020 Universal ISM
Band FSK Transmitter
DESCRIPTION
Silicon Labs’ Si4020 is a single chip, low power, multi-channel FSK
transmitter designed for use in applications requiring FCC or ETSI
conformance for unlicensed use in the 315, 433, 868, and 915 MHz bands.
Used in conjunction with IA4320, Silicon Labs’ FSK receiver, the Si4020
transmitter feature EZRadio
cost, and highly integrated solution that does not require production
alignments. All required RF functions are integrated. Only an external crystal
and bypass filtering are needed for operation.
The Si4020 features a completely integrated PLL for easy RF design, and its
rapid settling time allows for fast frequency hopping, bypassing multipath
fading and interference to achieve robust wireless links. In addition, highly
stable and accurate FSK modulation is accomplished by direct closed-loop
modulation with bit rates up to 256 kbps. The PLL’s high resolution allows
the use of multiple channels in any of the bands.
The integrated power amplifier of the transmitter has an open-collector
differential output that directly drive a loop antenna with programmable
output level. No additional matching network is required. An automatic
antenna tuning circuit is built in to avoid costly trimming procedures and de-
tuning due to the “hand effect”.
For low-power applications, the device supports automatic activation from
sleep mode. Active mode can be initiated by several wake-up events (on-chip
timer timeout, low supply voltage detection, or activation of any of the four
push-button inputs).
The Si4020’s on-chip digital interface supports both a microcontroller mode
and an EEPROM mode. The latter allows complete data transmitter
operation without a microcontroller (both control commands and data are
read from the EEPROM). Any wake-up event can start a transmission of the
corresponding data stored in the EEPROM.
Si4020-DS Rev 1.9r 0308
FUNCTIONAL BLOCK DIAGRAM
MOD
VDD
VSS
XTL
OSCILLATOR
CRYSTAL
BATTERY
WAKE-UP
DETECT
TIMER
LOW
REFERENCE
TRESHOLD
LOAD CAP
LOW BAT
TIMEOUT
TM
PERIOD
technology, which produces a flexible, low
CLOCK
PB1
SYNTHESIZER
CONTROLLER
PB2
PB3
FREQUENCY
PB4
LEVEL
OOK
RFN
nSEL
RFP
nIRQ/nLBD
CLK/SDO
SDI
SCK
FSK
FEATURES
• Fully integrated (low BOM, easy design-in)
• No alignment required in production
• Fast settling, programmable, high-resolution PLL
• Fast frequency hopping capability
• Stable and accurate FSK modulation with programmable
• High bit rate (up to 256 kbps)
• Direct loop antenna drive
• Automatic antenna tuning circuit
• Programmable output power level
• Alternative OOK support
• EEPROM mode supported
• SPI bus for applications with microcontroller
• Clock output for microcontroller
• Integrated programmable crystal load capacitor
• Power-saving sleep mode
• Multiple event handling options for wake-up activation
• Push-button event handling with switch de-bounce
• Wake-up timer
• Low battery detection
• 2.2 to 5.4 V supply voltage
• Low power consumption
• Low standby current (0.3 µA)
• Compact 16-pin TSSOP package
TYPICAL APPLICATIONS
• Remote control
• Home security and alarm
• Wireless keyboard/mouse and other PC peripherals
• Toy control
• Remote keyless entry
• Tire pressure monitoring
• Telemetry
• Personal/patient data logging
• Remote automatic meter reading
deviation
Microcontroller Mode
See www.silabs.com/integration for any applicable
errata. See back page for ordering information.
This document refers to Si4020-IC Rev I1.
PIN ASSIGNMENT
Si4020
www.silabs.com/integration
EEPROM Mode
1

Related parts for SI4020-I1-FT

SI4020-I1-FT Summary of contents

Page 1

... All required RF functions are integrated. Only an external crystal and bypass filtering are needed for operation. The Si4020 features a completely integrated PLL for easy RF design, and its rapid settling time allows for fast frequency hopping, bypassing multipath fading and interference to achieve robust wireless links. In addition, highly stable and accurate FSK modulation is accomplished by direct closed-loop modulation with bit rates up to 256 kbps. The PLL’ ...

Page 2

... DETAILED DESCRIPTION The Si4020 FSK transmitter is designed to cover the unlicensed frequency bands at 315, 433, 868, and 915 MHz. The device facilitates compliance with FCC and ETSI requirements. PLL The programmable PLL synthesizer determines the operating frequency, while preserving accuracy based on the on-chip crystal-controlled reference oscillator. The PLL’ ...

Page 3

... Crystal connection (other terminal of crystal to VSS) Ground reference Connect to logic high (microcontroller mode) Power amplifier output (open collector) Power amplifier output (open collector) Interrupt request output for microcontroller (active low) and status read output Positive supply voltage Serial data input for FSK modulation Si4020 3 ...

Page 4

... OPTIONAL Note: For detailed information about the supply decoupling capacitors see page 2.2µF 10nF GND OPTIONAL SDI 1 2 SCK 3 nSEL 4 PB1 IA4220 5 PB2 6 PB3 7 PB4 8 CLK GND Si4020 Antenna 16 FSK 15 VDD 14 nIRQ 13 RFP 12 RFN 11 MOD 10 VSS 9 XTL X1 10MHz GND GND 4 ...

Page 5

... Data output of serial control interface Crystal connection (other terminal of crystal to VSS) Ground reference Connect to logic low (EEPROM mode) Power amplifier output (open collector) Power amplifier output (open collector) Low battery voltage detector output (active low) Positive supply voltage Not used, connect to VDD or VSS Si4020 5 ...

Page 6

... PB1 IA4220 5 12 RFN PB2 6 11 PB3 MOD 7 10 PB4 VSS 8 9 SD0 XTL X1 10MHz GND Band [MHz 315 2.2µF 10nF 390pF 433 2.2µF 10nF 220pF 868 2.2µF 10nF 47pF 915 2.2µF 10nF 33pF Si4020 Antenna GND 6 ...

Page 7

... MHz band 868 MHz band 915 MHz band 315 MHz band 433 MHz band 868 MHz band 915 MHz band All blocks disabled (Note 1) Only crystal oscillator is on Programmable in 0.1 V steps 5 Si4020 Max Units 1000 V ºC 125 ºC 260 Max Units 5 ...

Page 8

... MHz from carrier Programmable in 30 kHz steps Programmable in 0.5 pF steps, tolerance +/- 10% After V has reached 90% of final value dd Crystal ESR < 100 Ohms (Note 7) Crystal oscillator must be enabled to ensure proper calibration at startup (Note pure capacitive load Si4020 Min Typ Max Units MHz 310.24 319.75 430.24 439 ...

Page 9

... Using anything but a 10 MHz crystal is allowed but not recommended because all crystal-referred timing and frequency parameters will change accordingly. Note 3: Adjustable in 8 steps. Note 4: Optimal antenna admittance/impedance for the Si4020: 9.4E-4 - j4.5E-3 315 MHz 8.4E-4 - j6.25E-3 434 MHz 1.15E-3 - j1.2E-2 868 MHz 1 ...

Page 10

... Samp Log 10 dB/ VAvg 100 Span 2 MHz Center 915 MHz Swee p 40.74 ms (2001 pts Si4020 At 433 MHz Mkr1 434.0630 MHz #Atten 5 dB -23.41 dBm 1 Span 2 MHz Sweep 40.74 ms (2001 pts) At 915 MHz Mkr1 915.0000 MHz Atten 5 dB -24.63 dBm 1 Span 2 MHz ...

Page 11

... MHz -37.62 dBm Span 50 MHz Start 700 MHz Sweep 45.47 s (401 pts) #Res BW 1 MHz Si4020 At 868 MHz with Atten 5 dB Span 2 MHz VBW 100 kHz Sweep 20.07 ms (2001 pts) 750–970 MHz Mkr1 915.0 MHz #Atten 0 dB -37.62 dBm 1 Stop 1 ...

Page 12

... Data setup time (SDI transition to SCK rising edge Data hold time (SCK rising edge to SDI transition Data delay time OD t Push-button input low time BL Timing Diagram t SS nSEL SCK SDI BIT15 BIT14 BIT13 nIRQ t OD BIT8 BIT7 BIT1 POR WK-UP Si4020 Minimum value [ns SHI t SH BIT0 nIRQ 12 ...

Page 13

... The resulting output frequency can be calculated as – (-1) SIGN out 0 where the channel center frequency (see the next command the three bit binary number <m2 : m0> SIGN = (ms) XOR (FSK input) Si4020 POR 8080h x1 x0 Crystal Load Capacitance [ 10.0 … 15.5 ...

Page 14

... For processing the events caused by the peripheral blocks (POR, LBD, wake-up timer, push-buttons) the chip requires operation of the crystal oscillator. This operation is fully controlled internally, independently from the status of the ex bit, but if the dc bit is zero, the oscillator remains active until Sleep Command is issued. (This command can be considered as an event controller reset.) Oscillator control logic Si4020 POR C000h 14 ...

Page 15

... For correct operation of the frequency synthesizer, the frequency and band of operation need to be programmed before the synthesizer is started. Directly after activation of the synthesizer, the RF VCO is calibrated to ensure proper operation in the programmed frequency band. • When coding for the Si4020 suggested that recalibration routines be added to compensate for significant changes in temperature and supply voltages. 4. Data Rate Command ...

Page 16

... With the addition of this feature, there is a way to build a device that uses 3 buttons, but performs 4 functions possible to detect multiple pressed push-buttons in both modes. In EEPROM mode the controller executes sequentially all the routines belonging to the pressed buttons the detector Si4020 POR C200h POR C400h POR CA00h 16 ...

Page 17

... Status rd Status rd POR, LBD, WAKE UP TIMER, P. BUTTONS EVENT FLAGS VDD D Q CLR filter To Digital glitch filter for Push-button4 Si4020 PB1 Status rd Note: *PB_nIRQdly is equal with the debounce time Notice: Only one EVENT is serviced simultaneously the others are pending. EVENT FLAG SLEEP Command * STAT ...

Page 18

... In EEPROM mode, when N bytes have been read and transmitted the controller continues reading the EEPROM and processing the data as control commands. This process stops after Sleep Command has been read from the EEPROM POR startup time. Valid data can be transmitted only when sp Si4020 POR E000h POR time, to switch on. The actual value sx 18 ...

Page 19

... This mode is not SPI compatible, therefore it is not recommended in microcontroller mode. • If the crystal oscillator and the PLL are running, the delay is not needed xtal osc. stable synthesizer on, PLL locked, PA ready to transmit NOTE: * See page 6 for the timing values Si4020 19 ...

Page 20

... With this command possible to read the chip’s status register through the nIRQ pin. This command clears the last serviced interrupt and processing the next pending one will start (if there is any). Status Register Read Sequence nSEL SCK instruction SDI nIRQ POR PB1 PB2 POR status out PB3 PB4 LBD nIRQ WK-UP Si4020 20 ...

Page 21

... Related Control Command Remarks Crystal – Synthesizer – Power Amplifier auto Power Management on/off mode enable Push Button Continuous execution for all push buttons Bit Rate BR = 10M / 35 9600 bps Sleep Power down Si4020 ...

Page 22

... AFC Control Command (bit 0 Related Control Command Remarks Configuration Control 433MHz band, Xtal C Frequency f =(43+1552/4000)*10MHz c Data Transmit Transmit the next 96 bytes Data Sleep Power down address 80 (see note) Si4020 =12pF f =90kHz L dev 22 ...

Page 23

... CRYSTAL SELECTION GUIDELINES The crystal oscillator of the Si4020 requires a 10 MHz parallel mode crystal. The circuit contains an integrated load capacitor in order to minimize the external component count. The internal load capacitance value is programmable from 8 0.5 pF steps. With appropriate PCB layout, the total load capacitance value can variety of crystal types can be used ...

Page 24

... During this period the chip does dd line if the supply filtering is not satisfactory or the internal resistance of the power supply is dd must drop below 250mV in order to trigger a power-on reset dd Si4020 and the internal ramp dd reaches the reset dd level reaches the reset threshold voltage (250mV ...

Page 25

... Setting bit<6> to high will change the reset mode to normal from the default sensitive. “SW Reset Command” Issuing FF00h command will trigger software reset. See the Wake-up Timer Command. Reset ramp line (100mV/ms) time Reset ramp line (100mV/ms) time ramp start.. Typical example when a switch-mode dd line. Follow the manufacturer’s recommendations dd Si4020 25 ...

Page 26

... Osc_On (In terna Status rd Slee p cmd Tclk_tail** Debouncing Time + Status rd cmd Stat. b its (PB x) Tsx* Status rd cmd Stat. b its (PB x) 1us Tsx* Status rd Slee p cmd Tclk_tail te: * Tsx : Crystal oscillator st artup Length of Tclk_tail is determined by the parameter in the Sleep comm a nd Si4020 26 ...

Page 27

... MATCHING NETWORK FOR A 50 OHM SINGLE ENDED OUTPUT Matching Network Schematic Si4020 L1 [nH] 72 315 MHz 43 433 MHz 10 868 MHz 10 915 MHz L2 [nH] L3 [nH] C1 [pF] 110 390 3.9 82 390 2.7 27 100 1.8 27 100 1.8 Si4020 C2 [pF] C3 [pF] 2.2 56..100 1.5 56..100 1 27..56 1 27..56 27 ...

Page 28

... EXAMPLE APPLICATIONS For Microcontroller Mode Schematic PCB Layout of Keyboard Transmitter Demo Circuit Using Microcontroller Mode (operating in the 915 MHz band) Top Layer Si4020 Bottom Layer 28 ...

Page 29

... For EEPROM Mode Schematic PCB Layout of Push-Button Transmitter Demo Circuit Using EEPROM Mode (operating in the 434 MHz band) Top Layer Si4020 Bottom Layer 29 ...

Page 30

... 6.40 BSC. 4,40 4,50 0,169 0,60 0,75 0,020 1.00 REF REF. 12 REF. 0.25 Detail “A” Dimensions in Inches Nom. Max 0,035 0,041 0,009 0,010 0,197 0,201 0.252 BSC. 0,173 0,177 0,024 0,030 0.39 REF REF. 12 REF. Si4020 30 ...

Page 31

... This page has been intentionally left blank. Si4020 31 ...

Page 32

... RELATED PRODUCTS AND DOCUMENTS Si4020 Universal ISM Band FSK Transmitter DESCRIPTION Si4020 16-pin TSSOP die Demo Boards and Development Kits DESCRIPTION Development Kit Remote Temperature Monitoring Station Related Resources DESCRIPTION Antenna Selection Guide Antenna Development Guide IA4320 Universal ISM Band FSK Receiver Note: Volume orders must include chip revision to be accepted ...

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