ATMEGA1284PR212-MU Atmel, ATMEGA1284PR212-MU Datasheet - Page 17

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ATMEGA1284PR212-MU

Manufacturer Part Number
ATMEGA1284PR212-MU
Description
BUNDLE ATMEGA1284P/RF212 QFN
Manufacturer
Atmel
Datasheet

Specifications of ATMEGA1284PR212-MU

Frequency
2.4GHz
Modulation Or Protocol
802.15.4 Zigbee, 6LoWPAN, ISM
Data Interface
PCB, Surface Mount
Memory Size
128kB Flash, 4kB EEPROM, 16kB RAM
Antenna Connector
PCB, Surface Mount
Package / Case
44-QFN, 32-QFN
Processor Series
ATMEGA128x
Core
AVR8
Data Bus Width
8 bit
Program Memory Type
Flash
Program Memory Size
128 KB
Data Ram Size
16 KB
Development Tools By Supplier
ATAVRRZ541, ATAVRRAVEN, ATAVRRZUSBSTICK, ATAVRISP2, ATAVRRZ201
For Use With
ATSTK600 - DEV KIT FOR AVR/AVR32
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Voltage - Supply
-
Power - Output
-
Operating Temperature
-
Applications
-
Sensitivity
-
Data Rate - Maximum
-
Current - Transmitting
-
Current - Receiving
-
Lead Free Status / Rohs Status
 Details
6.3
8059D–AVR–11/09
SRAM Data Memory
Figure 6-1.
Figure 6-2
The ATmega1284P is a complex microcontroller with more peripheral units than can be sup-
ported within the 64 location reserved in the Opcode for the IN and OUT instructions. For the
Extended I/O space from $060 - $FF in SRAM, only the ST/STS/STD and LD/LDS/LDD instruc-
tions can be used.
The first 4,352 Data Memory locations address both the Register File, the I/O Memory,
Extended I/O Memory, and the internal data SRAM. The first 32 locations address the Register
file, the next 64 location the standard I/O Memory, then 160 locations of Extended I/O memory
and the next 4,096 locations address the internal data SRAM.
The five different addressing modes for the data memory cover: Direct, Indirect with Displace-
ment, Indirect, Indirect with Pre-decrement, and Indirect with Post-increment. In the Register file,
registers R26 to R31 feature the indirect addressing pointer registers.
The direct addressing reaches the entire data space.
The Indirect with Displacement mode reaches 63 address locations from the base address given
by the Y- or Z-register.
When using register indirect addressing modes with automatic pre-decrement and post-incre-
ment, the address registers X, Y, and Z are decremented or incremented.
shows how the ATmega1284P SRAM Memory is organized.
Program Memory Map
Application Flash Section
Boot Flash Section
Program Memory
0xFFFF
0x0000
ATmega1284P
17

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