ATMEGA64RZAV-10PU Atmel, ATMEGA64RZAV-10PU Datasheet - Page 22

• Manufacturer Part Number: ATMEGA64RZAV-10PU
• Description: MCU ATMEGA644/AT86RF230 40-DIP
• Manufacturer: Atmel
• Series: ATMEGAr

Specifications of ATMEGA64RZAV-10PU

• Frequency: 2.4GHz
• Modulation Or Protocol: 802.15.4 Zigbee
• Power - Output: 3dBm
• Sensitivity: -101dBm
• Voltage - Supply: 1.8 V ~ 3.6 V
• Data Interface: PCB, Surface Mount
• Memory Size: 64kB Flash, 2kB EEPROM, 4kB RAM
• Antenna Connector: PCB, Surface Mount
• Package / Case: 40-DIP (0.600", 15.24mm)
• Wireless Frequency: 2.4 GHz
• Interface Type: JTAG, SPI
• Output Power: 3 dBm
• For Use With: ATSTK600-TQFP32 - STK600 SOCKET/ADAPTER 32-TQFPATAVRISP2 - PROGRAMMER AVR IN SYSTEMATSTK500 - PROGRAMMER AVR STARTER KIT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Operating Temperature: -
• Applications: -
• Data Rate - Maximum: -
• Current - Transmitting: -
• Current - Receiving: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• For Use With/related Products: ATmega64

9.11
9.12
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9.14
2593NS–AVR–07/10
Rev. 2593D - 04/06
Rev. 2593C - 03/06
Rev. 2593B - 03/06
Rev. 2593A-06/05
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Initial revision.
Updated
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Added “Not recommended in new designs”.
Removed RAMPZ– Extended Z-pointer Register for ELPM/SPM from datasheet.
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Updated code example in
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Removed the occurancy of ATmega164 and ATmega324.
Updated Adresses in Registers.
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Updated SRAM sizes in
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Updated Register bit Discription in
Updated Note in
Updated Feauters in
Changed name from “SFIOR“ to “ADCSRB“ in
”Bit 5 – ADATE: ADC Auto Trigger Enable” on page 250
Reserved Bits” on page
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Updated Example in
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1 on page
322,
Table 27-1 on page
”Bit 6 – ACBG: Analog Comparator Bandgap Select” on page
”Prescaling and Conversion Timing” on page
Table 10-1 on page
”Setting the Boot Loader Lock Bits by SPM” on page
”Register Summary” on page
”Architectural Overview” on page
”I/O Memory” on page
”PRR – Power Reduction Register” on page
”Signature Bytes” on page
”DC Characteristics” on page
”Typical Characteristics” on page
”Register Summary” on page
Figure 6-2 on page 18
”Errata” on page
Table 9-1 on page
260,
Table 25-7 on page
”Overview of the TWI Module” on page
”Supply Current of IO modules” on page
”Analog-to-digital Converter” on page
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”SRAM Data Memory” on page
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”Interrupt Vectors in ATmega644” on page
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47,
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Table 27-2 on page
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Table 9-4 on page 51,Table 10-1 on page 55,Table 23-
and
”Register Description” on page
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Figure 21-1 on page
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Table 25-15 on page 299,Table 26-6 on page
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”Starting a Conversion” on page
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and
ATmega644
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”Bit 7, 5:3 – Res:
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