AD8313ARM Analog Devices Inc, AD8313ARM Datasheet - Page 15

IC LOGARTIHMIC AMP 70DB 8-MSOP

AD8313ARM

Manufacturer Part Number
AD8313ARM
Description
IC LOGARTIHMIC AMP 70DB 8-MSOP
Manufacturer
Analog Devices Inc
Type
Logarithmic Ampr
Datasheet

Specifications of AD8313ARM

Rohs Status
RoHS non-compliant
Frequency
100MHz ~ 2.5GHz
Rf Type
RADAR, 802.11/Wi-Fi, 8.2.16/WiMax, Wireless LAN
Input Range
-65dBm ~ 0dBm
Accuracy
±1dB
Voltage - Supply
2.7 V ~ 5.5 V
Current - Supply
13.7mA
Package / Case
8-TSSOP, 8-MSOP (0.118", 3.00mm Width)
Number Of Channels
1
Number Of Elements
8
Power Supply Requirement
Single
Voltage Gain Db
84dB
Input Resistance
0.0009@5VMohm
Input Bias Current
10@5VnA
Single Supply Voltage (typ)
3/5V
Dual Supply Voltage (typ)
Not RequiredV
Power Dissipation
200mW
Rail/rail I/o Type
Rail to Rail Output
Single Supply Voltage (min)
2.7V
Single Supply Voltage (max)
5.5V
Dual Supply Voltage (min)
Not RequiredV
Dual Supply Voltage (max)
Not RequiredV
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
8
Package Type
MSOP
Lead Free Status / RoHS Status
Not Compliant

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APPLICATIONS
BASIC CONNECTIONS FOR LOG (RSSI) MODE
Figure 29 shows the AD8313 connected in its basic measurement
mode. A power supply between 2.7 V and 5.5 V is required. The
power supply to each of the VPOS pins should be decoupled
with a 0.1 µF surface-mount ceramic capacitor and a 10 Ω series
resistor.
The PWDN pin is shown as grounded. The AD8313 may be
disabled by a logic high at this pin. When disabled, the chip
current is reduced to about 20 µA from its normal value of
13.7 mA. The logic threshold is at V
function occurs in about 1.8 µs. However, that additional
settling time is generally needed at low input levels. While the
input in this case is terminated with a simple 50 Ω broadband
resistive match, there are many ways in which the input termi-
nation can be accomplished. These are discussed in the Input
Coupling section.
VSET is connected to VOUT to establish a feedback path that
controls the overall scaling of the logarithmic amplifier. The
load resistance, R
full-scale output of 1.75 V can be generated with the limited
available current of 400 µA max.
As stated in the Absolute Maximum Ratings table, an externally
applied overvoltage on the VOUT pin, which is outside the
range 0 V to V
the device. If overvoltages are expected on the VOUT pin, a
series resistor, R
resistor is sufficient to protect against overvoltage up to ±5 V;
1000 Ω should be used if an overvoltage of up to ±15 V is
expected. Since the output stage is meant to drive loads of no
more than 400 μA, this resistor does not impact device perform-
ance for higher impedance drive applications (higher output
current applications are discussed in the Increasing Output
Current section).
+V
+V
S
S
680pF
680pF
10Ω
10Ω
R1
R2
Figure 29. Basic Connections for Log (RSSI) Mode
POS
PROT
0.1µF
0.1µF
, is sufficient to cause permanent damage to
L
, should not be lower than 5 kΩ so that the
53.6Ω
, should be included as shown. A 500 Ω
1
2
3
4
INHI
INLO
VPOS VOUT
VPOS PWDN
AD8313
COMM
VSET
POS
8
7
6
5
/2, and the enable
R
PROT
R
L
= 1MΩ
Rev. D | Page 15 of 24
OPERATING IN CONTROLLER MODE
Figure 30 shows the basic connections for operation in controller
mode. The link between VOUT and VSET is broken and a set-
point is applied to VSET. Any difference between V
equivalent input power to the AD8313 drives V
supply rail or close to ground. If V
input power, V
This mode of operation is useful in applications where the output
power of an RF power amplifier (PA) is to be controlled by an
analog AGC loop (Figure 31). In this mode, a setpoint voltage,
proportional in dB to the desired output power, is applied to the
VSET pin. A sample of the output power from the PA, via a
directional coupler or other means, is fed to the input of the
AD8313.
ENVELOPE OF
TRANSMITTED
SIGNAL
V
amplifier. The gain control transfer function of the power
amplifier should be an inverse relationship, that is, increasing
voltage decreases gain.
A positive input step on V
power from the PA) drives V
arranged to increase the gain of the PA. The loop settles when
V
to the dB equivalent of V
OUT
OUT
Figure 30. Basic Connections for Operation in the Controller Mode
is applied to the gain control terminal of the power
settles to a voltage that sets the input power to the AD8313
+V
+V
DIRECTIONAL
COUPLER
S
S
10Ω
10Ω
OUT
R1
R3
Figure 31. Setpoint Controller Operation
is driven toward ground, and vice versa.
0.1µF
0.1µF
AMPLIFIER
POWER
RFIN
SET
SET
AD8313
.
OUT
1
2
3
4
(indicating a demand for increased
INHI
INLO
VPOS VOUT
VPOS PWDN
AD8313
toward ground. This should be
VOUT
SET
VSET
is greater than the equivalent
RF IN
COMM
VSET
8
7
6
5
R
OUT
CONTROL DAC
PROT
SETPOINT
SET
either to the
AD8313
and the

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