MC9328MX21SCVK Freescale Semiconductor, MC9328MX21SCVK Datasheet - Page 55

• Manufacturer Part Number: MC9328MX21SCVK
• Description: IC MCU I.MX21 266MHZ 289-MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: i.MX21r

Specifications of MC9328MX21SCVK

• Core Processor: ARM9
• Core Size: 32-Bit
• Speed: 266MHz
• Connectivity: 1-Wire, EBI/EMI, I²C, IrDA, MMC, SmartCard, SPI, SSI, UART/USART, USB OTG
• Peripherals: DMA, I²S, LCD, POR, PWM, WDT
• Number Of I /o: 192
• Program Memory Type: ROMless
• Voltage - Supply (vcc/vdd): 1.45 V ~ 3.3 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 289-MAPBGA
• Operating Temperature (min): -40C
• Operating Temperature (max): 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Ram Size: -
• Program Memory Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Compliant

1. All the timings for the SSI are given for a non-inverted serial clock polarity (TSCKP/RSCKP = 0) and a non-inverted frame sync
Freescale Semiconductor
Ref
No.
27a
27b
Ref
No.
(TFSI/RFSI = 0). If the polarity of the clock and/or the frame sync have been inverted, all the timing remains valid by inverting
the clock signal STCK/SRCK and/or the frame sync STFS/SRFS shown in the tables and in the figures.
10
20
21
22
23
24
25
26
28
29
30
31
32
33
34
1
2
3
4
5
6
7
8
9
(Tx/Rx) CK clock period
(Tx) CK high to FS (bl) high
(Rx) CK high to FS (bl) high
(Tx) CK high to FS (bl) low
(Rx) CK high to FS (bl) low
(Tx) CK high to FS (wl) high
(Rx) CK high to FS (wl) high
(Tx) CK high to FS (wl) low
(Rx) CK high to FS (wl) low
(Tx) CK high to STXD valid from high impedance
(Tx) CK high to FS (bl) low
(Rx) CK high to FS (bl) low
(Tx) CK high to FS (wl) high
(Rx) CK high to FS (wl) high
(Tx) CK high to FS (wl) low
(Rx) CK high to FS (wl) low
(Tx) CK high to STXD valid from high impedance
(Tx) CK high to STXD high
(Tx) CK high to STXD low
(Tx) CK high to STXD high impedance
SRXD setup time before (Rx) CK low
SRXD hole time after (Rx) CK low
SRXD setup before (Tx) CK falling
SRXD hold after (Tx) CK falling
SRXD setup before (Tx) CK falling
SRXD hold after (Tx) CK falling
Table 35. SSI to SSI1 Ports Timing Parameters (Continued)
Parameter
Parameter
1
90
Synchronous External Clock Operation (SSI1 Ports)
Synchronous Internal Clock Operation (SSI1 Ports)
Table 36. SSI to SSI2 Ports Timing Parameters
MC9328MX21 Technical Data, Rev. 3.4
Internal Clock Operation
Minimum
Minimum
10.22
10.79
10.22
10.79
10.22
10.79
10.05
10.00
10.00
10.05
19.90
-0.21
-0.21
-0.21
-0.21
0.78
2.59
0.01
0.01
0.01
0.01
0.34
0
0
0
1
.91
1.8 V ± 0.1 V
1.8 V ± 0.1 V
(SSI2 Ports)
Maximum
Maximum
17.63
19.67
17.63
19.67
17.63
19.67
15.75
15.63
15.63
15.75
0.15
0.05
0.15
0.05
0.15
0.05
0.15
0.05
0.72
–
–
–
–
–
–
–
Minimum
Minimum
19.90
90.91
-0.21
-0.21
-0.21
-0.21
8.82
9.39
8.82
9.39
8.82
9.39
8.66
2.28
8.61
8.61
8.66
0.47
0.01
0.01
0.01
0.01
0.34
0
0
0
3.0 V ± 0.3 V
3.0 V ± 0.3 V
Maximum
Maximum
16.24
18.28
16.24
18.28
16.24
18.28
14.36
14.24
14.24
14.36
0.15
0.05
0.15
0.05
0.15
0.05
0.15
0.05
0.72
–
–
–
–
–
–
–
Specifications
Unit
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
55