MC9328MX21SCVK Freescale Semiconductor, MC9328MX21SCVK Datasheet - Page 24

• Manufacturer Part Number: MC9328MX21SCVK
• Description: IC MCU I.MX21 266MHZ 289-MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: i.MX21r

Specifications of MC9328MX21SCVK

• Core Processor: ARM9
• Core Size: 32-Bit
• Speed: 266MHz
• Connectivity: 1-Wire, EBI/EMI, I²C, IrDA, MMC, SmartCard, SPI, SSI, UART/USART, USB OTG
• Peripherals: DMA, I²S, LCD, POR, PWM, WDT
• Number Of I /o: 192
• Program Memory Type: ROMless
• Voltage - Supply (vcc/vdd): 1.45 V ~ 3.3 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 289-MAPBGA
• Operating Temperature (min): -40C
• Operating Temperature (max): 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Ram Size: -
• Program Memory Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Compliant

Specifications
Note: In this mode, the max frequency of the BMI_CLK/CS can be up to 36MHz (double as max data pad speed).
Note: The BMI_CLK/CS can only be divided by 2,4,8,16 from HCLK.
3.8.1.4
Figure 9
When the BMI_WRITE signal is asserted, the BMI can write a 1 to READ bit of control register to issue
a WRITE cycle. This bit is cleared automatically when the WRITE operation is completed. In a WRITE
burst the MMD will write COUNT+1 data to the BMI. The user can issue another WRITE operation if the
MMD still has data to write after the first operation completed.
The BMI can latch the data either at falling edge or the next rising edge of the BMI_CLK/CS according to
the DATA_LATCH bit. When the DATA_LATCH bit is set, the BMI latch data at the next rising edge and
latch the last data using the internal clock.
BMI_WRITE signal can not be negated when the WRITE operation is proceeding.
24
BMI_WRITE
BMI_CLK/CS
BMI_READ_REQ
BMI_D[15:0]
shows the MMD write BMI timing when BMI drives BMI_CLK/CS.
Transfer data setup time
Transfer data hold time
Read_req hold time
MMD Write BMI Timing
(MASTER_MODE_SEL=0, MMD_MODE_SEL=1, MMD_CLKOUT=1)
Item
Table 16. MMD Read BMI Timing Table when BMI Drives Clock
Figure 8. BMI Drives Clock, MMD Read BMI Timing
DMA or CPU write data to TxFIFO
Tds
MC9328MX21 Technical Data, Rev. 3.4
1T
TxD1
Symbol
Tds
Tdh
Trh
Tdh
TxD2
Minimum
2
2
2
Typical
–
–
–
Maximum
18
8
8
Trh
Last TxD
Freescale Semiconductor
Unit
ns
ns
ns