DS1236S-10N+T&R Maxim Integrated Products, DS1236S-10N+T&R Datasheet
DS1236S-10N+T&R
Specifications of DS1236S-10N+T&R
Related parts for DS1236S-10N+T&R
DS1236S-10N+T&R Summary of contents
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FEATURES Holds microprocessor in check during power transients Halts and restarts an out-of-control microprocessor Monitors pushbutton for external override Warns microprocessor of an impending power failure Converts CMOS SRAM into nonvolatile memory Unconditionally write-protects memory when power supply is ...
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An internal watchdog timer can also force the reset outputs to the active state if the strobe input is not driven low prior to watchdog timeout. Reset control and wake-up/sleep control inputs ...
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POWER MONITOR The DS1236 employs a band gap voltage reference and a precision comparator to monitor the 5-volt supply ( microprocessor-based systems. When an out-of-tolerance condition occurs, the RST and CC outputs are driven to the active state. ...
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NON-MASKABLE INTERRUPT The DS1236 generates a non-maskable interrupt microprocessor. A precision comparator monitors the voltage level at the IN pin relative to a reference generated by the internal band gap. The IN pin is a high-impedance input allowing for a ...
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DS1236 FUNCTIONAL BLOCK DIAGRAM Figure 1 If the IN pin is connected to V CCO mode (RC=0). In the CMOS mode (RC=V produce a pulse on the pin. Given that any NMI the pin will remain high. ...
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This delay of write protection until the current memory cycle is completed prevents CE the corruption of data. If CEO unconditionally disabled within t maximum propagation delay of 20 ...
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NMI/FROM ST/INPUT Figure 3 POWER MONITOR, WATCHDOG Figure 4 PUSH BUTTON RESET TIMING Figure 5 NON-MASKABLE INTERRUPT Figure DS1236 ...
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EXAMPLE 1: 5 VOLT SUPPLY 10k OHM, V ∴ 4.80 = EXAMPLE 2: 12 VOLT SUPPLY 10k OHM, V ∴ 9.00 = NONVOLATILE SRAM Figure 10k X 2.54 10k R1 + 10k X ...
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When the RC pin is tied to ground, the DS1236 is designed to interface with NMOS processors which do not have the microamp currents required during a battery backed mode. Grounding the RC pin does, however, continue to support nonvolatile ...
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In this way, the NMI the supply voltage, as monitored by the IN pin, is above or below a selected operating value. This is illustrated in Figure 3. As discussed above, the RC pin determines the timing relationships ...
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Removal of the sleep mode by the pin threshold at V when the RC pin is tied high (CMOS mode). Subsequent power-up of the V TP with the RC pin tied high will activate the ...
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CMOS MODE POWER-DOWN ( Figure 10 CCO DS1236 ...
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NMOS MODE POWER-DOWN (RC = GND) Figure DS1236 ...
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NMOS MODE POWER-UP (RC = GND) Figure DS1236 ...
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CMOS MODE POWER-UP ( Figure 13 CCO DS1236 ...
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WAKE/SLEEP CONTROL Figure 14 OPTIONS FOR INVOKING WAKEUP Figure DS1236 ...
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ABSOLUTE MAXIMUM RATINGS* Voltage on V Pin Relative to Ground CC Voltage on I/O Relative to Ground Voltage on IN Pin Relative to Ground Operating Temperature Operating Temperature (Industrial Version) Storage Temperature Soldering Temperature * This is a stress rating ...
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PARAMETER Output Current @ 2.4V Power Sup. Trip Point Power Supply Trip (5% Option) IN Input Pin Current IN Input Trip Point AC ELECTRICAL CHARACTERISTICS PARAMETER V Fail Detect to RST, RST NMI TP RESET Active Time ...
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CAPACITANCE PARAMETER Input Capacitance Output Capacitance NOTES: 1. All voltages referenced to ground. A 0.1 μF capacitor is recommended between V 2. Measured with PF, CEO CCO the maximum average load which the DS1236 ...